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公开(公告)号：US20170178781A1
公开(公告)日：2017-06-22
申请号：US14973314
申请日：2015-12-17
Applicant: Analog Devices Global
Inventor： Alan J. O'DONNELL , Robert GUYOL , Maria Jose MARTINEZ , Jan KUBIK , Padraig L. Fitzgerald , Javier CALPE MARAVILLA , Michael P. LYNCH , Eoin E. ENGLISH
IPC: H01F17/00
CPC classification number: H01F17/0006 , B81B3/00 , B81B3/0091 , G01R33/09 , H01F17/0033 , H01F2017/0066 , H01L43/08
Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
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公开(公告)号：US09672431B2
公开(公告)日：2017-06-06
申请号：US14097223
申请日：2013-12-04
Applicant: ANALOG DEVICES GLOBAL
Inventor： Joseph Fernandez , Sreenath Kottekkode
CPC classification number: G06K9/00805 , G06K9/00791 , G06K9/3233 , G06K9/4642 , G06K9/6212 , G06K9/6218 , G06K9/6269 , G06T7/13 , G06T2207/10016 , G06T2207/20072 , G06T2207/30261 , G08G1/16
Abstract: In an example detection system for vehicles or other objects of interest, objects are detected in real-time at full VGA 30 frame per second resolution. A preprocessor may perform run-length encoding (RLE) to provide detected edges. The image may then be scanned from the bottom up to identify vertical clusters or “stacks” or RLEs. Vertical clusters with low vertical density may be eliminated as poor vehicle candidates. Vertical clusters not eliminated may then be processed with a histogram of gradients algorithm, and confirmed with a support vector machine algorithm. A range to the nearest object may also be calculated, and a warning provided if the object is too close.
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公开(公告)号：US20170155414A1
公开(公告)日：2017-06-01
申请号：US14956257
申请日：2015-12-01
Applicant: ANALOG DEVICES GLOBAL
Inventor： Sivanendra Selvanayagam , Shane A. O'Mahony , Michael J. Deeney , Niall Kevin Kearney
CPC classification number: H04B1/126 , H03F1/0205 , H03F1/301 , H03F3/193 , H03F3/45179 , H03F2200/294 , H03F2200/451
Abstract: Provided herein are apparatus and methods for transconductance amplifiers, such as split cascode low-noise transconductance amplifiers (LNTAs). In an embodiment, an LNTA includes split current paths each coupled to a different mixer by way of a different alternating current (AC) coupling capacitor. The split current paths of the LNTA can be enabled during different modes of operation, such as when the input to the LNTA is within different frequency bands.
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公开(公告)号：US09660675B2
公开(公告)日：2017-05-23
申请号：US14982701
申请日：2015-12-29
Applicant: Analog Devices Global
Inventor： Patrick Pratt
CPC classification number: H04B1/0475 , H03F1/3247 , H03F3/19 , H03F3/245 , H03F2200/451 , H03M1/12 , H03M1/66 , H04B2001/0425 , H04L25/03878 , H04L27/368
Abstract: Otherwise incompatible digital predistortion and uptilt can be used together, such as in a cable television or other cable communications system having a frequency-dependent signal loss at high frequencies. The predistortion can be used to compensate for a nonlinear gain compression of a power amplifier at higher frequencies. Additional uptilt and equalizer circuits can be included to address deleterious distortion effects that may otherwise arise by using predistortion and uptilt together. Training and adaptation of various components are described. Fine and coarse uptilt adjustments can be provided.
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公开(公告)号：US09658637B2
公开(公告)日：2017-05-23
申请号：US14182877
申请日：2014-02-18
Applicant: Analog Devices Global
Inventor： Stefan Marinca
Abstract: A proportional to absolute temperature (PTAT) circuit is provided. By judiciously combining circuit elements into two or more cell it is possible to effectively dump bias current into impedance resistive element of a first cell from other cells of the circuit. As a result the circuit as a whole can operate with smaller resistive elements and therefore occupy less area when implemented in silicon. It is also possible to reduce the supply current that is required for providing specific output currents or voltages.
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Patent Agency Ranking
公开(公告)号：US20170126222A1
公开(公告)日：2017-05-04
申请号：US15012574
申请日：2016-02-01
Applicant: Analog Devices Global
Inventor： Marcus O'Sullivan , Aldo Togneri
IPC: H03K17/0812
CPC classification number: H03K17/08122 , H03K17/0822
Abstract: A device for controlling an electronic switch between a power supply and a load includes a sensing circuit to measure a current to the load and a control circuit to control operation of the electronic switch if the current exceeds a current limit. The control circuit includes a normal current circuit to output a first switch control current to the electronic switch and a boost current circuit to output a second switch control current to the electronic switch, the first switch control current being higher than the second switch control current.
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公开(公告)号：US09638724B2
公开(公告)日：2017-05-02
申请号：US14290820
申请日：2014-05-29
Applicant: Analog Devices Global
CPC classification number: G01R19/0092 , G01R17/02 , G01R35/005
Abstract: Current measurement apparatus comprises a measurement arrangement and a signal source. The measurement arrangement is configured to measure a current signal drawn by a load. The signal source is operative to apply a reference input signal to the measurement arrangement whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal. The signal source comprises a current multiplier which defines first and second current paths and is configured such that: the first path carries a multiplier input current signal; the second path carries a multiplier output current signal which determines the reference input signal and which corresponds to the multiplier input current signal multiplied by a multiplier value determined by the current multiplier; and the multiplier input current signal and the multiplier output current signal are carried on their respective paths in a same direction relative to a power supply voltage. Power drawn through the second path as divided by the multiplier value is less than the power drawn through the first path.
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公开(公告)号：US20170089966A1
公开(公告)日：2017-03-30
申请号：US14866036
申请日：2015-09-25
Applicant: ANALOG DEVICES GLOBAL
Inventor： Christian Steffen Birk , John A. Cleary , David Sayago Montilla , Elizabeth A. Lillis , Padraig O'Connor , Eoin E. English , Patrick Pratt , Kathleen Embrechts , Wim Rens , Jan Crols
IPC: G01R27/26
CPC classification number: G01R27/2605 , B81B2201/0235 , B81C99/003
Abstract: Embodiments of the present invention may provide a method of measuring an unknown capacitance of a device. The method may comprise the steps of driving a test signal to a circuit system that includes a current divider formed by the device with unknown capacitance and a reference capacitor; mirroring a current developed in the reference capacitor to a second circuit system that includes a measurement impedance; measuring a voltage within the second circuit system; and deriving a capacitance of the unknown capacitance based on the measured voltage with reference to a capacitance of the reference capacitor and the measurement impedance.
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公开(公告)号：US09600014B2
公开(公告)日：2017-03-21
申请号：US14272061
申请日：2014-05-07
Applicant: ANALOG DEVICES GLOBAL
Inventor： Stefan Marinca , Gabriel Banarie
Abstract: The present disclosure relates to a method and apparatus for generating a voltage reference. More particularly the present disclosure relates to a methodology and circuitry configured to provide an output signal that combines a proportional to absolute temperature component with a complimentary to absolute temperature component to generate a stable output which is not temperature dependent.
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公开(公告)号：US09590591B1
公开(公告)日：2017-03-07
申请号：US15072697
申请日：2016-03-17
Applicant: ANALOG DEVICES GLOBAL
Inventor： Ahmed Mohammad Ashry Othman
CPC classification number: H03H11/245 , H01P1/227
Abstract: Provided herein are high frequency signal attenuators. In certain configurations, an integrated circuit includes a signal conductor that carries a radio frequency (RF) signal, a shield conductor routed with the signal conductor and biased with a ground voltage, and an attenuation circuit that provides a controllable amount of attenuation to the RF signal. The attenuation circuit includes a shunt circuit electrically connected between a signal tapping position of the signal conductor and a shield tapping position of the shield conductor. Connecting the shunt circuit in this manner enhances high frequency performance by reducing a length of an effective loop from the signal conductor to an adjacent portion of the shield conductor.
Abstract translation: 本文提供的是高频信号衰减器。 在某些配置中，集成电路包括承载射频（RF）信号的信号导体，用信号导体路由并用接地电压偏置的屏蔽导体，以及向RF提供可控量的衰减的衰减电路 信号。 衰减电路包括电连接在信号导体的信号分接位置和屏蔽导体的屏蔽分接位置之间的分流电路。 以这种方式连接分流电路通过减少从信号导体到屏蔽导体的相邻部分的有效环路的长度来增强高频性能。
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