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    SYSTEM AND METHOD FOR IMITATION LEARNING
    384.
    发明公开
    SYSTEM AND METHOD FOR IMITATION LEARNING 审中-公开

    公开(公告)号：US20230325712A1

    公开(公告)日：2023-10-12

    申请号：US18109975

    申请日：2023-02-15

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Jin Chul CHOI

    IPC: G06N20/00

    CPC classification number: G06N20/00

    Abstract: The present disclosure relates to a system and method for imitation learning. The system for imitation learning may include a data augmentation device configured to acquire a plurality of augmented data sets from a plurality of demonstration data sets corresponding to an expert's demonstration behavior trajectory using a behavioral replication model that infers behavioral data from input state data and an inverse behavioral replication model that infers state data from input behavioral data, and an imitation learning device configured to perform imitation learning to derive a model that outputs behavioral data similar to an expert in a specific state using the plurality of demonstration data sets and the plurality of augmented data sets, in which the plurality of demonstration data sets and the plurality of augmented data sets each include a pair of corresponding state data and behavioral data.

    ULTRASONIC FLOW METER HAVING MISSING VALUE AND OUTLIER CORRECTION FUNCTION AND METHOD OF OPERATION THEREOF
    386.
    发明公开
    ULTRASONIC FLOW METER HAVING MISSING VALUE AND OUTLIER CORRECTION FUNCTION AND METHOD OF OPERATION THEREOF 审中-公开

    公开(公告)号：US20230324210A1

    公开(公告)日：2023-10-12

    申请号：US17960522

    申请日：2022-10-05

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Jongwoo CHOI ,  Wan Ki PARK ,  JINSOO HAN

    IPC: G01F1/667

    CPC classification number: G01F1/668

    Abstract: An ultrasonic flow meter is provided. The flow meter includes a detector that transmits a signal to a fluid and receives a signal from the fluid, a memory configured to store instructions, and a processor electrically connected to the memory and configured to execute the instructions, and when the instructions are executed by the processor, the processor calculates a first flow-rate value of the fluid using a signal transmitted to the fluid and a signal transmitted from the fluid, determines whether the first flow-rate value is missing, calculates a second flow-rate value of the fluid using a physical quantity of the fluid if the first flow-rate value is missing, and replaces the missing value with the second flow value, and the physical quantity is measured by an auxiliary sensor located installed on a pipe through which the fluid flows.

    MOS(metal oxide silicon) controlled thyristor device
    388.
    发明授权
    MOS(metal oxide silicon) controlled thyristor device 有权

    公开(公告)号：US11784247B2

    公开(公告)日：2023-10-10

    申请号：US17792070

    申请日：2021-06-10

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Kun Sik Park ,  Jong Il Won ,  Doo Hyung Cho ,  Dong Yun Jung ,  Hyun Gyu Jang

    IPC: H01L29/745 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

    CPC classification number: H01L29/7455 ,  H01L29/0839 ,  H01L29/1012 ,  H01L29/66378

    Abstract: A MOS controlled thyristor device according to the concept of the present invention includes a substrate comprising a first surface and a second surface, which face each other, gate patterns disposed on the first surface, a cathode electrode configured to cover the gate patterns, and an anode electrode disposed on the second surface, The substrate includes a lower emitter layer having a first conductive type, a lower base layer having a second conductive type on the lower emitter layer, an upper base region provided in an upper portion of the lower emitter layer and having a first conductive type, wherein the upper base region is configured to expose a portion of a top surface of the lower base layer, an upper emitter region having a second conductive type and provided in an upper portion of the upper base region, a first doped region having a first conductive type and a second doped region surrounded by the first doped region and having a second conductive type, wherein the first and second doped regions are provided in an upper portion of the upper emitter region, and a first doping pattern having a first conductive type, which is provided on one surface of the upper portion of the upper emitter region. The first doping pattern is interposed between the upper base region and the first doped region along a first direction parallel to the top surface of the substrate. The first doping pattern is configured to expose a top surface of the upper emitter region on the other surface of the upper portion of the upper emitter region. Each of the gate patterns is configured to cover portions of an exposed top surface of the lower base layer, an exposed top surface of the upper base layer, an exposed top surface of the upper emitter region, a top surface of the first doping pattern, and a top surface of the first doped region. The cathode electrode is configured to cover portions of top and side surfaces of the gate pattern, a top surface of the second doped region, and a top surface of the first doped region. The first conductive type and the second conductive type are different from each other.

    PHASE SHIFTER FOR LINEARLY SHIFTING PHASE OF INPUT SIGNAL BASED ON PHASE CONTROL SIGNALS
    390.
    发明公开
    PHASE SHIFTER FOR LINEARLY SHIFTING PHASE OF INPUT SIGNAL BASED ON PHASE CONTROL SIGNALS 审中-公开

    公开(公告)号：US20230318577A1

    公开(公告)日：2023-10-05

    申请号：US18182571

    申请日：2023-03-13

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Seon-Ho HAN ,  Bon Tae KOO

    IPC: H03H11/18 ,  H03H11/20

    CPC classification number: H03H11/18 ,  H03H11/20

    Abstract: Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.

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