公开(公告)号：US09755027B2

公开(公告)日：2017-09-05

申请号：US15265647

申请日：2016-09-14

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Hyung Seok Lee ,  Ki Hwan Kim ,  Sang Choon Ko ,  Zin-Sig Kim ,  Jeho Na ,  Eun Soo Nam ,  Young Rak Park ,  Junbo Park ,  Chi hoon Jun ,  Dong Yun Jung

IPC分类号： H01L29/66 ,  H01L29/40 ,  H01L29/778 ,  H01L29/423 ,  H01L29/20 ,  H01L29/417

CPC分类号： H01L29/402 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66462 ,  H01L29/7786

摘要： Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.

公开(公告)号：US11784247B2

公开(公告)日：2023-10-10

申请号：US17792070

申请日：2021-06-10

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Kun Sik Park ,  Jong Il Won ,  Doo Hyung Cho ,  Dong Yun Jung ,  Hyun Gyu Jang

IPC分类号： H01L29/745 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/7455 ,  H01L29/0839 ,  H01L29/1012 ,  H01L29/66378

摘要： A MOS controlled thyristor device according to the concept of the present invention includes a substrate comprising a first surface and a second surface, which face each other, gate patterns disposed on the first surface, a cathode electrode configured to cover the gate patterns, and an anode electrode disposed on the second surface, The substrate includes a lower emitter layer having a first conductive type, a lower base layer having a second conductive type on the lower emitter layer, an upper base region provided in an upper portion of the lower emitter layer and having a first conductive type, wherein the upper base region is configured to expose a portion of a top surface of the lower base layer, an upper emitter region having a second conductive type and provided in an upper portion of the upper base region, a first doped region having a first conductive type and a second doped region surrounded by the first doped region and having a second conductive type, wherein the first and second doped regions are provided in an upper portion of the upper emitter region, and a first doping pattern having a first conductive type, which is provided on one surface of the upper portion of the upper emitter region. The first doping pattern is interposed between the upper base region and the first doped region along a first direction parallel to the top surface of the substrate. The first doping pattern is configured to expose a top surface of the upper emitter region on the other surface of the upper portion of the upper emitter region. Each of the gate patterns is configured to cover portions of an exposed top surface of the lower base layer, an exposed top surface of the upper base layer, an exposed top surface of the upper emitter region, a top surface of the first doping pattern, and a top surface of the first doped region. The cathode electrode is configured to cover portions of top and side surfaces of the gate pattern, a top surface of the second doped region, and a top surface of the first doped region. The first conductive type and the second conductive type are different from each other.

公开(公告)号：US09613884B2

公开(公告)日：2017-04-04

申请号：US14872868

申请日：2015-10-01

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Chi Hoon Jun ,  Jeho Na ,  Dong Yun Jung ,  Sang Choon Ko ,  Eun Soo Nam ,  Hyung Seok Lee

IPC分类号： H01L23/34 ,  H01L23/467

CPC分类号： H01L23/467

摘要： Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.

公开(公告)号：US11637192B2

公开(公告)日：2023-04-25

申请号：US17355977

申请日：2021-06-23

申请人： Electronics and Telecommunications Research Institute

发明人： Kun Sik Park ,  Jong Il Won ,  Doo Hyung Cho ,  Hyun Gyu Jang ,  Dong Yun Jung

IPC分类号： H01L29/749 ,  H01L29/745 ,  H01L29/66

摘要： The present invention forms an off-FET channel having a uniform and short length by using a self-align process of a method of forming and recessing a spacer, thereby enhancing the current driving capability of an off-FET and the uniformity of a device operation.

公开(公告)号：US10734878B2

公开(公告)日：2020-08-04

申请号：US16122631

申请日：2018-09-05

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Minki Kim ,  Junbo Park ,  Dong Yun Jung

IPC分类号： H02K41/00 ,  H02K41/03 ,  H02P6/16 ,  H02K1/12 ,  H02K1/22 ,  H02P6/28

摘要： The present disclosure relates to a spherical wheel motor and a control system thereof, and more particularly, the spherical wheel motor and the control system include a spherical rotor and a stator surrounding an upper surface of the rotor. The rotor includes a spherical outer shell part, a first axial magnet extending in a horizontal direction in the outer shell part, a second axial magnet extending in the horizontal direction and facing the first axial magnet, and a rotary magnet belt provided in a form of a belt with the first axial magnet and the second axial magnet as a central axis. The rotary magnet belt includes a plurality of first rotary magnets and a plurality of second rotary magnets arranged alternately.

公开(公告)号：US10014401B2

公开(公告)日：2018-07-03

申请号：US15414156

申请日：2017-01-24

申请人： Electronics and Telecommunications Research Institute

发明人： Jeho Na ,  Hyung Seok Lee ,  Chi Hoon Jun ,  Sang Choon Ko ,  Myungjoon Kwack ,  Young Rak Park ,  Woojin Chang ,  Hyun-Gyu Jang ,  Dong Yun Jung

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L23/31 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/7787 ,  H01L23/315 ,  H01L23/3171 ,  H01L23/3178 ,  H01L23/3192 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41758 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/66462 ,  H01L29/7786

摘要： A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.

公开(公告)号：US09905654B2

公开(公告)日：2018-02-27

申请号：US15215414

申请日：2016-07-20

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Dong Yun Jung ,  Hyun Soo Lee ,  Sang Choon Ko ,  Minki Kim ,  Jeho Na ,  Eun Soo Nam ,  Young Rak Park ,  Junbo Park ,  Hyung Seok Lee ,  Hyun-Gyu Jang ,  Chi Hoon Jun

IPC分类号： H01L29/205 ,  H01L29/66 ,  H01L29/872 ,  H01L29/20

CPC分类号： H01L29/205 ,  H01L29/2003 ,  H01L29/66212 ,  H01L29/872

摘要： Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure. The first electrode structural body includes a first electrode, a second electrode, and a third electrode, which are arranged in a clockwise direction, the second electrode structural body includes a fourth electrode, a fifth electrode, and a sixth electrode, which are arranged in a clockwise direction, the first electrode and the sixth electrode, which are connected to each other, are connected to an external circuit, the third electrode and the fourth electrode, which are connected to each other, are connected to an external circuit, and each of the second electrode and the fifth electrode is connected to the external circuit.

公开(公告)号：US09748941B2

公开(公告)日：2017-08-29

申请号：US15223826

申请日：2016-07-29

申请人： Electronics and Telecommunications Research Institute

发明人： Minki Kim ,  Hyun-Gyu Jang ,  Dong Yun Jung ,  Sang Choon Ko ,  Hyun Soo Lee ,  Chi Hoon Jun

IPC分类号： H03K17/081 ,  H01L29/778 ,  H01L27/088 ,  H01L29/20

CPC分类号： H03K17/08104 ,  H01L27/0883 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/778 ,  H01L29/7786 ,  H03K17/102 ,  H03K2017/6875

摘要： Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.