公开(公告)号：US20240064941A1

公开(公告)日：2024-02-22

申请号：US17892283

申请日：2022-08-22

Applicant: Mellanox Technologies, Ltd.

Inventor： Ran Hasson RUSO ,  Alon RUBINSTEIN ,  Elad MENTOVICH ,  Tahir CADER ,  Siddha GANJU

IPC: H05K7/20 ,  G06N20/00

CPC classification number: H05K7/20836 ,  G06N20/00

Abstract: A system and method for controlling cooling in a server is provided. The method includes receiving one or more server indicators relating to a task to be executed by at least one component of the server. The method also includes determining an expected cooling demand for the at least one component based on the one or more server indicators. The method further includes adjusting a cooling amount provided by a cooling mechanism based on the expected cooling demand of the at least one component. Various embodiments are described herein.

公开(公告)号：US20240063814A1

公开(公告)日：2024-02-22

申请号：US17890337

申请日：2022-08-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Vladimir SHALIKASHVILI ,  Ran SANDHAUS

IPC: H03M7/30

CPC classification number: H03M7/6088

Abstract: A data compression system comprising computer memory to store plural compression algorithms and a hardware processor to apply compression algorithm/s to incoming data items, wherein the compression algorithm to be applied to individual data item/s from among the incoming data items is selected, from among the plural compression algorithms, by the hardware processor, depending at least on the individual data item.

公开(公告)号：US11906873B2

公开(公告)日：2024-02-20

申请号：US17694159

申请日：2022-03-14

Applicant: Mellanox Technologies, Ltd.

Inventor： Nikos Argyris ,  Paraskevas Bakopoulos ,  Dimitrios Kalavrouziotis ,  Elad Mentovich

IPC: G02F1/21 ,  G02F1/225 ,  H04B10/50

CPC classification number: G02F1/212 ,  G02F1/225 ,  H04B10/505

Abstract: Embodiments are disclosed for providing a serializer and/or a deserializer with redundancy using optical modulators. An example system includes an MZM structure that comprises a first waveguide interferometer arm structure and a second waveguide interferometer arm structure. The first waveguide interferometer arm structure comprises a first segmented electrode associated with at least a first electrode and a second electrode. The second waveguide interferometer arm structure comprises a second segmented electrode associated with at least a third electrode and a fourth electrode. The MZM structure is configured to convert an optical input signal into an optical output signal through application of a digital data signal to the first electrode and the third electrode, and application of a redundant digital data signal to the second electrode and the fourth electrode.

公开(公告)号：US20240053542A1

公开(公告)日：2024-02-15

申请号：US17900490

申请日：2022-08-31

Applicant: Mellanox Technologies, Ltd.

Inventor： Dimitrios Kalavrouziotis ,  Elad Mentovich ,  Paraskevas Bakopoulos

IPC: G02B6/293 ,  H04B10/50 ,  H04B10/532

CPC classification number: G02B6/29302 ,  H04B10/501 ,  H04B10/532 ,  G02B6/29395 ,  G02B6/29344

Abstract: Optical communication devices and associated methods of manufacturing are provided. An example optical communication device includes a substrate defining a first end and a second end. The optical communication device also includes a primary optical communication medium attached to the second end and a secondary optical communication medium attached to the second end. The optical communication device further includes a signal preclusion component supported by the substrate that selectively preclude signal transmission of optical signals received via the first end to either the primary optical communication medium or the secondary optical communication medium.

公开(公告)号：US11888753B2

公开(公告)日：2024-01-30

申请号：US17398677

申请日：2021-08-10

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Liron Mula ,  Zachy Haramaty ,  Shachar Bar Tikva ,  Dekel Dadon

IPC: H04L12/823 ,  H04L47/32 ,  H04L47/30

CPC classification number: H04L47/32 ,  H04L47/30

Abstract: A relay device is provided that may identify a quantity of empty data byte locations in a data buffer of the relay device. The relay device may receive an indicator associated with transmitting data packets. The relay device may pause or enable a lossless flow of data between the relay device, a host device, and a peer device based on the quantity of empty data byte locations, the indicator, or both. The relay device may include a first data interface coupled with a peer device, a second data interface coupled with a host device, a data buffer configured to store data packets received from the host device, and a state machine that enables a lossless transmission of data between the host device and peer device. The state machine may transmit a pause frame to the host device based on a data buffer utilization reaching a data storage capacity.

公开(公告)号：US20240014916A1

公开(公告)日：2024-01-11

申请号：US17858236

申请日：2022-07-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Thomas Kernen ,  Dotan David Levi ,  Bar Or Shapira ,  Georgi Mihaylov Chalakov ,  Aviad Itzhak Raveh

IPC: H04J3/06

CPC classification number: H04J3/0697

Abstract: System, methods, and devices for sharing time information between machines are provided. In one example, a system includes a Precision Time Protocol (PTP) Hardware Clock (PHC) and an application. The application receives time information from the PHC along with contextual metadata associated with the time information, analyzes the contextual metadata associated with the time information, and determines a context in which the PHC is disciplined. The context in which the PHC is disciplined may control a manner in which the application uses the time information.

公开(公告)号：US20240012773A1

公开(公告)日：2024-01-11

申请号：US17858102

申请日：2022-07-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Gil Bloch ,  Richard Graham ,  Yossef Itigin ,  Ortal Ben Moshe ,  Roman Nudelman

IPC: G06F13/28

CPC classification number: G06F13/28 ,  G06F2213/28

Abstract: A Direct Memory Access (DMA) device includes an interface and a DMA engine. The interface is configured to communicate with a first memory and with a second memory. The DMA engine is configured to (i) receive a request to transfer data between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

公开(公告)号：US11870590B2

公开(公告)日：2024-01-09

申请号：US17107990

申请日：2020-12-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Idan Burstein ,  Roee Moyal ,  Ariel Shahar ,  Noam Bloch ,  Ran Koren

IPC: H04L1/18 ,  H04L1/1829 ,  G06F15/173

CPC classification number: H04L1/1829 ,  G06F15/17331

Abstract: A method for data transfer includes transmitting a sequence of data packets from a first computer over a network to a second computer in a single RDMA data transfer transaction. Upon receipt of a second packet in the sequence without previously having received the first packet, the second computer sends a NAK packet over the network to the first computer, indicating that the first packet was not received. A retransmission mode is selected responsively to the type of the transaction, such that when the transaction is of a first type, the first packet is retransmitted from the first computer to the second computer in response to the NAK packet without retransmitting the second packet, and when the transaction is of a second type, both the first and second packets are retransmitted from the first computer to the second computer in response to the NAK packet.

公开(公告)号：US20240007548A1

公开(公告)日：2024-01-04

申请号：US17855362

申请日：2022-06-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Aviv Kfir ,  Ortal Ben Moshe ,  Barak Gafni

IPC: H04L69/22 ,  H04L45/50 ,  H04L12/46

CPC classification number: H04L69/22 ,  H04L45/50 ,  H04L12/4633

Abstract: A networking device and system are described, among other things. An illustrative system is disclosed to include a packet parser and a state machine that includes a NULL header state. The packet parser references the state machine to enter the NULL header state automatically in response to parsing a packet header of a predetermined type and then, while in the NULL header state, analyzes a subsequent set of bytes without advancing a parser pointer.

公开(公告)号：US20230418746A1

公开(公告)日：2023-12-28

申请号：US17958697

申请日：2022-10-03

Applicant: Mellanox Technologies, Ltd.

Inventor： Omri Kahalon ,  Avi Urman ,  Ilan Pardo ,  Omer Cohen ,  Sayantan Sur ,  Barak Biber ,  Saar Tarnopolsky ,  Ariel Shahar

IPC: G06F12/0802 ,  G06F9/48

CPC classification number: G06F12/0802 ,  G06F9/4881 ,  G06F2212/60

Abstract: A method includes receiving a network packet into a hardware pipeline of a network device; parsing and retrieving information of the network packet; determining, by the hardware pipeline, a packet-processing action to be performed by matching the information to a data structure of a set of flow data structures; sending, by the hardware pipeline, an action request to a programmable core, the action request being populated with data to trigger the programmable core to execute a hardware thread to perform a job, which is associated with the packet-processing action and that generates contextual data; retrieving the contextual data updated by the programmable core; and integrating the contextual data into performing the packet-processing action.