System and method to increase display area utilizing a plurality of discrete displays

    公开(公告)号:US11093197B2

    公开(公告)日:2021-08-17

    申请号:US16045269

    申请日:2018-07-25

    Abstract: A method includes receiving, at a master agent, announcements from candidate consumer agents indicating the presence of the candidate consumer agents. Each announcement includes display parameters for a display of the corresponding candidate consumer agent. The method further includes receiving at the master agent content parameters from a producer agent, the content parameters defining characteristics of content to be provided by the consumer agent. A mosaic screen is configured based on the received announcements and the content parameters. This configuring of the mosaic screen includes selecting ones of the consumer agents for which an announcement was received and generating content distribution parameters based on the content parameters and the display parameters of the selected ones of the consumer agents. The generated content distribution parameters are provided to the consumer agent.

    DRAM interconnect structure having ferroelectric capacitors exhibiting negative capacitance

    公开(公告)号:US11063112B2

    公开(公告)日:2021-07-13

    申请号:US16164481

    申请日:2018-10-18

    Inventor: John H. Zhang

    Abstract: An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.

    Gate all around vacuum channel transistor

    公开(公告)号:US11031504B2

    公开(公告)日:2021-06-08

    申请号:US16878287

    申请日:2020-05-19

    Inventor: John H. Zhang

    Abstract: A vacuum channel transistor having a vertical gate-all-around (GAA) architecture provides high performance for high-frequency applications, and features a small footprint compared with existing planar devices. The GAA vacuum channel transistor features stacked, tapered source and drain regions that are formed by notching a doped silicon pillar using a lateral oxidation process. A temporary support structure is provided for the pillar during formation of the vacuum channel. Performance of the GAA vacuum channel transistor can be tuned by replacing air in the channel with other gases such as helium, neon, or argon. A threshold voltage of the GAA vacuum channel transistor can be adjusted by altering dopant concentrations of the silicon pillar from which the source and drain regions are formed.

    Human presence detection
    388.
    发明授权

    公开(公告)号:US11030289B2

    公开(公告)日:2021-06-08

    申请号:US16050628

    申请日:2018-07-31

    Abstract: A method includes sensing through time-of-flight measurements a distance of an object from an electronic device, sensing motion of the electronic device, sensing acoustic signals received by the electronic device, and detecting the presence of a human proximate the electronic device based on the sensed distance, motion and acoustic signals. Access to the electronic device is controlled based on whether a human is detected as being present.

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