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公开(公告)号：US20240234266A1
公开(公告)日：2024-07-11
申请号：US18522852
申请日：2023-11-29
发明人： Masaharu YAMAJI
IPC分类号： H01L23/495
CPC分类号： H01L23/49575 , H01L23/49503 , H01L23/4952 , H01L23/49562 , H02P27/06
摘要： A semiconductor device 100A includes drive chips 21[k], a control chip 41A including a plurality of terminals H including a voltage terminal Hc and power supply terminals Hb[k] and configured to control each of the drive chips 21[k], using a corresponding one of power supply voltages Vb[k] supplied to a corresponding one of the power supply terminals Hb[k], a die pad 63 for supplying control voltage Vcc to the voltage terminal Hc, wires Qb[k] each connected to a corresponding one of the power supply terminals Hb[k] and for supplying a corresponding one of the power supply voltages Vb[k] to a corresponding one of the power supply terminals Hb[k], and a semiconductor chip 30A used for bootstrap operation to generate the power supply voltages Vb[k] and including diodes the number of which is the same as the number of the power supply voltages Vb[k].
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公开(公告)号：US20240234261A1
公开(公告)日：2024-07-11
申请号：US18523157
申请日：2023-11-29
发明人： Masaharu YAMAJI
IPC分类号： H01L23/495 , H01L23/00 , H01L25/065
CPC分类号： H01L23/4952 , H01L23/4951 , H01L23/49575 , H01L24/33 , H01L24/48 , H01L25/0652 , H01L2224/3301 , H01L2224/33515 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2924/01029 , H01L2924/13055 , H01L2924/1427
摘要： A semiconductor device includes a plurality of power semiconductor elements and a control chip including a plurality of terminals including a first terminal and a plurality of second terminals and configured to control the plurality of power semiconductor elements, using power supply voltage supplied to the plurality of second terminals. The semiconductor device also includes a first conductor for supplying a predetermined control voltage to the first terminal, a plurality of first wirings individually connected to the plurality of second terminals and for supplying the power supply voltage to the plurality of the second terminals, a die pad on which the control chip is arranged, and a semiconductor chip including a diode used for bootstrap operation to generate the power supply voltage. The semiconductor chip is fixed to the die pad by an insulating material. The die pad is connected to a terminal to which a reference voltage is supplied.
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公开(公告)号：US12033984B2
公开(公告)日：2024-07-09
申请号：US18316783
申请日：2023-05-12
发明人： Mitsuhiro Kakefu , Hiroaki Ichikawa
IPC分类号： H01L25/07 , H01L23/00 , H01L23/498 , H01L29/739 , H01L29/861
CPC分类号： H01L25/072 , H01L23/49844 , H01L24/48 , H01L29/7393 , H01L29/861 , H01L2224/48225
摘要： A semiconductor device including a semiconductor unit that has a first arm part, which includes: first and second semiconductor chips having first and second control electrodes on their front surfaces, a first circuit pattern where the first and second semiconductor chips are disposed, a second circuit pattern to which the first and second control electrodes are connected, and a first control wire electrically connecting the first and second control electrodes and the second circuit pattern sequentially in a direction; and a second arm part, which includes third and fourth semiconductor chips having third and fourth control electrodes on their front surfaces, a third circuit pattern where the third and fourth semiconductor chips are disposed, a fourth circuit pattern to which the third and fourth control electrodes are connected, and a second control wire electrically connecting the third and fourth control electrodes and the fourth circuit pattern sequentially in the direction.
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公开(公告)号：US20240213311A1
公开(公告)日：2024-06-27
申请号：US18497333
申请日：2023-10-30
发明人： Syunki NARITA , Shinsuke HARADA
CPC分类号： H01L29/0634 , H01L29/1608 , H01L29/7811 , H01L29/7813
摘要： In an active region and an edge termination region, a drift layer is constituted by a same SJ structure with a parallel pn layer. In the edge termination region, a p+-type extension portion between the active region and a JTE structure fixes the JTE structure to the potential of a source electrode. The p+-type extension portion is between and in contact with a p-type base extension portion and the parallel pn layer. The p+-type extension portion is an extension of upper portions of p+-type regions provided in the active region to mitigate electric field near bottoms of gate trenches. Between the p-type base extension portion and the parallel pn layer is free of the lower portions of the p+-type regions. Thus, a length in the depth direction of the p-type column regions of the edge termination region is longer than that of the p-type column regions of the active region.
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公开(公告)号：US20240213307A1
公开(公告)日：2024-06-27
申请号：US18427607
申请日：2024-01-30
发明人： Tomohiro MORIYA , Akimasa KINOSHITA
IPC分类号： H01L29/06 , H01L21/02 , H01L21/04 , H01L29/16 , H01L29/423
CPC分类号： H01L29/06 , H01L21/02378 , H01L21/02529 , H01L21/046 , H01L29/1608 , H01L29/4236
摘要： A p-type impurity concentration profile in a depth direction of a p-type base region is adjusted by two or more stages of ion implantation to the p-type base region. The two or more stages of ion implantation are each set to have a mutually different acceleration voltage and a dose amount that is lower the higher is the acceleration voltage. The p-type impurity concentration profile is asymmetrical about a depth position of a highest impurity concentration and the impurity concentration decreases from this depth position in a direction to n+-type source regions and in a direction to an n+-type drain region. In the p-type impurity concentration profile, the impurity concentration decreases, forming a step at one or more different depth positions closer to the n+-type drain region than is the depth position of the highest impurity.
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公开(公告)号：US20240210222A1
公开(公告)日：2024-06-27
申请号：US18497327
申请日：2023-10-30
发明人： Shiori YAMASHITA , Takuya SHIBASAKI
摘要： A clamp-on type ultrasonic flowmeter that uses ultrasonic waves for measuring a flow rate of a fluid flowing inside a piping, incudes: an ultrasonic transducer having a wedge on which piezoelectric device is attached.
Further, the wedge of the ultrasonic transducer has a positioning recess portion formed on a tilted surface of the wedge, and the positioning recess portion defines a position of the piezoelectric device with respect to the wedge of the ultrasonic transducer when the piezoelectric device is attached thereto.-
公开(公告)号：US12021323B2
公开(公告)日：2024-06-25
申请号：US16940994
申请日：2020-07-28
发明人： Mayumi Shiohara
CPC分类号： H01R12/585 , H05K1/141 , H05K3/308 , H05K2201/1059
摘要： A semiconductor module, including a plurality of semiconductor elements, each of which has a main electrode and a control electrode, an enclosure that encloses the plurality of semiconductor elements, a plurality of first connection terminals, each of which is electrically connected to the control electrode of one of the semiconductor elements and extends from the enclosure, and a plurality of second connection terminals, each of which is electrically connected to the main electrode of one of the semiconductor elements and extends from the enclosure. Each of the second connection terminals includes a press-fit part formed in substantially a plate shape having two plate surfaces. For a portion of the press-fit part, the two plate surfaces thereof are separated from each other in a thickness direction of the press-fit part, at least one of the plate surfaces thereof having elasticity, to thereby form an elastic part of the press-fit part.
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公开(公告)号：US20240204051A1
公开(公告)日：2024-06-20
申请号：US18497450
申请日：2023-10-30
CPC分类号： H01L29/063 , H01L21/046 , H01L22/14 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7813
摘要： A silicon carbide semiconductor substrate has a silicon carbide semiconductor substrate of a first conductivity type and a first semiconductor layer of the first conductivity type, provided at a front surface of the silicon carbide semiconductor substrate and having a doping concentration lower than that of the silicon carbide semiconductor substrate. A portion of the first semiconductor layer contains a dopant of a second conductivity type. A concentration of the dopant of the second conductivity type in the first semiconductor layer differs in a direction parallel to an orientation flat or in a direction orthogonal to the orientation flat, the orientation flat indicating a crystal axis direction, such that a distribution of a net doping concentration in the first semiconductor layer has a variation equal to or less than a predetermined threshold.
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公开(公告)号：US20240199941A1
公开(公告)日：2024-06-20
申请号：US18592705
申请日：2024-03-01
发明人： Azusa WADA , Shinya UI , Hideki YAMAMOTO
IPC分类号： C09K8/528
CPC分类号： C09K8/528
摘要： A method for selecting a scale dispersant compatible with characteristics of a target water and scale is deposited. A method for selecting a scale dispersant, comprising steps of obtaining a coordinate Cs of an intrinsic physical property value, based on Hansen solubility, of a target scale; a step of obtaining a coordinate Cw of an intrinsic physical property value, based on Hansen solubility, of a target water; and selecting a scale dispersant based on a positional relationship between the coordinate Cs of the intrinsic physical property value of the target scale and the coordinate Cw of the intrinsic physical property value of the target water.
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公开(公告)号：US12009390B2
公开(公告)日：2024-06-11
申请号：US17709383
申请日：2022-03-30
发明人： Katsunori Ueno
IPC分类号： H01L29/78 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/20 , H01L29/66 , H01L21/04 , H01L21/265 , H01L21/324
CPC分类号： H01L29/063 , H01L29/0623 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/66068 , H01L29/66712 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L21/046 , H01L21/26546 , H01L21/3245
摘要： A vertical MOSFET having a compound semiconductor layer is provided, the vertical MOSFET comprising a gate electrode, a gate insulating film provided between the gate electrode and the compound semiconductor layer, a drift region provided directly in contact with at least a part of the gate insulating film and being a part of the compound semiconductor layer, and a high resistance region provided at least in the drift region, is positioned below at least a part of the gate insulating film, and has a higher resistance value per unit length than that of the drift region.
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