公开(公告)号：US10191769B2

公开(公告)日：2019-01-29

申请号：US15024555

申请日：2014-09-24

Applicant: BRITISH TELECOMMUNICATIONS PLC

Inventor： Behnam Azvine ,  Trevor Philip Martin

IPC: G06F9/44 ,  G06F9/48 ,  G06F9/54 ,  G06F11/30 ,  G06F21/55 ,  G06F8/30

Abstract: A sequence identification apparatus comprising a processor, wherein the apparatus is adapted to access a directed acyclic graph data structure of equivalence classes of events in event sequences identified in a plurality of time-ordered events, and wherein the graph is optimized such that initial and final sub-sequences of event sequences having common equivalence classes are combined in the graph, the apparatus comprising: a code generator adapted to generate executable code corresponding to the graph such that the code includes an instruction sequence for each event classification of the graph, the code sequence for an event classification being adapted to evaluate criteria to determine if an event corresponds to the event classification; a virtual machine adapted to execute the generated executable code such that, in use, the executable code filters incoming time-ordered events based on the graph.

公开(公告)号：US09894587B2

公开(公告)日：2018-02-13

申请号：US15490938

申请日：2017-04-19

Applicant: Khalifa University of Science, Technology and Research ,  British Telecommunications Plc ,  Emirates Telecommunications Corporation

Inventor： James Aweya ,  Ivan Boyd

IPC: H04W36/00 ,  H04W36/30 ,  H04B17/318 ,  H04W36/08 ,  H04W36/36 ,  H04W56/00 ,  H04W74/04

CPC classification number: H04W36/30 ,  H04B17/318 ,  H04J3/0667 ,  H04L43/08 ,  H04L43/106 ,  H04W36/08 ,  H04W36/36 ,  H04W56/0035 ,  H04W74/04

Abstract: This invention relates to the use of frequency synchronization accuracy as an additional quality metric for mobile call handover between base stations. Call handover is of major importance within any mobile network; without checking frequency synchronization before handover dropped calls and interrupted communication can result.

公开(公告)号：US09843405B2

公开(公告)日：2017-12-12

申请号：US14566943

申请日：2014-12-11

Applicant: Khalifa University of Science, Technology, and Research ,  British Telecommunications plc ,  Emirates Telecommunications Corporation

Inventor： James Aweya

IPC: H04J3/06 ,  H04B10/071 ,  G06F1/10

CPC classification number: H04J3/0667 ,  G06F1/10 ,  H04B10/071

Abstract: This invention relates to methods and devices for clock synchronization. The invention has particular application in the alignment of slave clocks to a master clock and in dealing with transmission delay asymmetries where the forward and reverse communication paths between the master and slave clocks have asymmetric transmission rates. Such methods and devices have particular application in small cell backhaul solutions for 4G/LTE deployments. In embodiments of the invention, the slave clock uses link rate information to estimate the transmission delay asymmetry and thus estimate the offset and skew of the slave clock. Embodiments provide a simple linear approximation technique and a Kalman filter-based technique for estimating offset and skew of the slave clock.

公开(公告)号：US09531395B2

公开(公告)日：2016-12-27

申请号：US14044075

申请日：2013-10-02

Applicant: Khalifa University of Science, Technology, and Research ,  British Telecommunications plc ,  Emirates Telecommunications Corporation

Inventor： James Aweya

IPC: H04J3/06 ,  H03L7/197

CPC classification number: H03L7/1976 ,  H03L2207/50 ,  H04J3/0667 ,  H04J3/0697

Abstract: This invention relates to methods and devices for time and frequency synchronization, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a digital phase locked loop (DPLL) based on direct digital synthesis to provide both time and frequency signals for use at the slave (time client). An example of this DPLL in conjunction with a recursive least squares mechanism for clock offset and skew estimation is also provided.

Abstract translation: 本发明涉及用于时间和频率同步的方法和装置，特别是涉及使用例如IEEE 1588精确时间协议（PTP）的分组网络。 定时协议消息暴露在网络中的伪影，例如分组延迟变化（PDV）或分组丢失。 本发明的实施例提供了一种基于直接数字合成的数字锁相环（DPLL），以提供在从机（时间客户机）上使用的时间和频率信号。 还提供了该DPLL与用于时钟偏移和偏移估计的递归最小二乘机制的示例。

公开(公告)号：US20160204864A1

公开(公告)日：2016-07-14

申请号：US14915716

申请日：2014-09-04

Applicant: BRITISH TELECOMMUNICATIONS PLC

Inventor： Trevor P LINNEY ,  David J THORNE ,  Leslie D HUMPHREY ,  Christopher M CROOT

IPC: H04B10/27

CPC classification number: H04B10/27 ,  H04L12/2858 ,  H04L12/2869

Abstract: In an FTTDP optical fibre network, Distribution point units are reverse powered by customer premises equipment and therefore liable to power failure. When the distribution point unit loses power it is unavailable to respond to requests for performance or metric data. A persistent manager agent functions as a proxy for the distribution point unit, gathering metric and performance data from the distribution point unit using at least one EOC channel and handling requests for performance and metric data issued from other network devices. The persistent manager can also schedule downloads of firmware and configuration data to the distribution point unit.

Abstract translation: 在FTTDP光纤网络中，分配点单元由客户驻地设备反向供电，因此易于断电。 当分配点单元失去电力时，不能响应对性能或度量数据的请求。 永久管理器代理作为分发点单元的代理，从至少一个EOC信道从分发点单元收集度量和性能数据，并处理从其他网络设备发出的性能和度量数据的请求。 永久性管理器还可以将固件和配置数据的下载调度到分发点单元。

公开(公告)号：US20160055337A1

公开(公告)日：2016-02-25

申请号：US14779620

申请日：2014-03-24

Applicant: BRITISH TELECOMMUNICATIONS PLC

Inventor： Fadi EL-MOUSSA

IPC: G06F21/56

CPC classification number: G06F21/566 ,  G06F2221/033

Abstract: A processing device (10) includes a processor (12), an interface (14) and a memory (100). The memory (100) is formed from system Random Access Memory (RAM) and one or more other storage devices. The memory (100) can be considered as comprising working memory (110) and persistent storage (120). The working memory includes the system RAM but may also use memory from one or more other storage devices and when certain suspicious program detection modules are operating also stores a comparison table (112) discussed below. Contained within the persistent storage are several executable program files as follows: an Absolute Memory Address Calculator executable program (121) which is responsible for causing the system (10) to inspect a copy of a persistently stored (and compiled) executable program (e.g. an executable program (125, 126, 127, . . . as stored in the persistent storage 120) and to calculate expected absolute memory locations for the various functions or helper programs that it makes calls to and to store these in a table (112) that it creates in the working memory (110) for this purpose; a Loaded Program Accessor executable program (122) which is responsible for causing the system (10) to inspect a copy of an executable program as loaded in the working memory (110) of the system after loading and linking of the program have been completed, to determine the actual memory locations stored in the Import Address Table (IAT) of the loaded program, and to store these actual memory locations in the comparison table (112); a Memory Location Comparator executable program (123) which is responsible for causing the system (10) during execution of this program to compare the calculated expected absolute memory locations with their respective actual accessed memory locations as stored in the comparison table of memory locations (112); and a Corroborator executable program (124) which is responsible for causing the system (10) during execution of this program to perform a corroboration of any mismatches of memory locations detected in the memory location pairs stored in the table (112) of memory locations, by, in the present embodiment, inspecting the contents of any executable instructions contained at the actually accessed memory location to look for the presence of an instruction causing a new thread of execution to be instantiated.

公开(公告)号：US09112628B2

公开(公告)日：2015-08-18

申请号：US14044083

申请日：2013-10-02

Applicant: Khalifa University of Science, Technology, and Research ,  British Telecommunications plc ,  Emirates Telecommunications Corporation

Inventor： James Aweya ,  Zdenek Chaloupka

IPC: H04L7/00 ,  H04J3/06

CPC classification number: H04J3/0667

Abstract: This invention relates to methods and devices for compensating for path asymmetry, particularly with reference to time and frequency synchronization. The invention has particular application where time and frequency synchronization over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP) is being carried out. Typically communication path delays between a time server (master) and a client (slave) are estimated using the assumption that the forward delay on the path is the same as the reverse delay. As a result, differences between these delays (delay asymmetries) can cause errors in the estimation of the offset of the slave clock from that of the master. Embodiments of the invention provide techniques and devices for compensating for path delay asymmetries that arise when timing protocol messages experience dissimilar queuing delays in the forward and reverse paths.

Abstract translation: 本发明涉及用于补偿路径不对称的方法和装置，特别是参考时间和频率同步。 本发明具有特定的应用，其中使用例如IEEE 1588精确时间协议（PTP）的分组网络进行时间和频率同步。 通常，使用路径上的前向延迟与反向延迟相同的假设来估计时间服务器（主机）和客户机（从机）之间的通信路径延迟。 因此，这些延迟之间的差异（延迟不对称）可能导致从时钟偏移与主器件的偏移的估计误差。 本发明的实施例提供了用于补偿当定时协议消息在正向和反向路径中经历不同的排队延迟时产生的路径延迟不对称的技术和设备。

公开(公告)号：US20150167998A1

公开(公告)日：2015-06-18

申请号：US14104425

申请日：2013-12-12

Applicant: Khalifa University of Science, Technology, and Research ,  Emirates Telecommunications Corporation ,  British Telecommunications plc

Inventor： Fabrice Saffre ,  Mark Shackleton ,  Hanno Hildmann ,  Sébastien Matthieu René Nicolas

IPC: F24F11/00

CPC classification number: F24F11/0009 ,  F24F11/30 ,  F24F11/46

Abstract: This invention relates to methods and systems for controlling consumption, particularly power consumption, more particularly by appliances in a building, and is generally suitable for integration with building management systems. Embodiments of the invention provide methods and systems which probabilistically limit the aggregated power load of a plurality of climate control appliances in a building to a selected value, whilst seeking to minimize the deviation from target environmental conditions within the building. The embodiments of the invention propose distributed decision-making by individual devices based on projected deviation from the target conditions after a period of activity or inactivity.

Abstract translation: 本发明涉及用于控制消耗，特别是功率消耗的方法和系统，特别是建筑物中的设备，并且通常适用于与楼宇管理系统的集成。 本发明的实施例提供了将建筑物中的多个气候控制设备的聚合功率负载概率地限制到选定值的方法和系统，同时寻求使与建筑物内的目标环境条件的偏差最小化。 本发明的实施例提出了在活动或不活动时段之后基于与目标条件的预测偏差的各个设备的分布式决策。

公开(公告)号：US20150167997A1

公开(公告)日：2015-06-18

申请号：US14104416

申请日：2013-12-12

Applicant: Khalifa University of Science, Technology, and Research ,  Emirates Telecommunications Corporation ,  British Telecommunications plc

Inventor： Fabrice Saffre ,  Mark Shackleton ,  Hanno Hildmann ,  Sébastien Matthieu René Nicolas

IPC: F24F11/00

CPC classification number: F24F11/0009 ,  F24F11/30 ,  F24F11/46

Abstract: This invention relates to methods and systems for limiting consumption, particularly power consumption, more particularly by appliances in a building, and is generally suitable for integration with building management systems. Embodiments of the invention provide arrangements in which the aggregated power load of a plurality of appliances is capped to a selected value (which may be arbitrary, or may be dictated by conditions) whilst seeking to minimize the deviation from target environmental conditions within the building through a combination of distributed decision making by the appliances themselves and centralized orchestration, which may be informed by real-time sensor readings and/or known properties of the building. The distributed decision-making by individual devices may be based on projected deviation from the target conditions after a period of activity or inactivity but with a central controller which determines which devices should be switched on.

Abstract translation: 本发明涉及用于限制消耗，特别是功率消耗的方法和系统，特别是建筑物中的设备，并且通常适用于与楼宇管理系统的集成。 本发明的实施例提供了这样的配置，其中多个装置的聚集功率负载被限制到选定值（其可以是任意的，或者可以由条件规定），同时寻求使建筑物内的目标环境条件的偏离最小化， 电器本身的分布式决策和集中式编排的组合，可以通过实时传感器读数和/或建筑物的已知属性来通知。 单个设备的分布式决策可以基于在活动或不活动时段之后的预期偏离目标条件，而是基于确定应该接通哪些设备的中央控制器。

公开(公告)号：US20150092796A1

公开(公告)日：2015-04-02

申请号：US14044068

申请日：2013-10-02

Applicant: Khalifa University of Science, Technology, and Research ,  Emirates Telecommunications Corporation ,  British Telecommunications plc

Inventor： James Aweya

IPC: H04J3/06

CPC classification number: H04J3/0667

Abstract: This invention relates to methods and devices for time and frequency synchronization, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a recursive least squares mechanism for clock offset and skew estimation. A major potential advantage of such estimation is that it does not require knowledge of the statistics of the measurement noise and process noise. An implementation using a digital phase locked loop based on direct digital synthesis to provide both time and frequency signals for use at the slave (time client) is also provided.

Abstract translation: 本发明涉及用于时间和频率同步的方法和装置，特别是涉及使用例如IEEE 1588精确时间协议（PTP）的分组网络。 定时协议消息暴露在网络中的伪影，例如分组延迟变化（PDV）或分组丢失。 本发明的实施例提供了用于时钟偏移和偏差估计的递归最小二乘机制。 这种估计的主要潜在优点是它不需要了解测量噪声和过程噪声的统计。 还提供了使用基于直接数字合成的数字锁相环来提供在从机（时间客户端）使用的时间和频率信号的实现。