METHODS AND SYSTEMS FOR VALIDATINGLOCATIONS USING CHANGES IN CHANNEL CHARACTERISTICS

    公开(公告)号:US20240031202A1

    公开(公告)日:2024-01-25

    申请号:US18256225

    申请日:2020-12-07

    CPC classification number: H04L25/0212 H04W64/00

    Abstract: This invention relates to methods and systems for determining whether a reference point in a location system has changed using the entropy of channel impulse responses. In one embodiment a method of determining whether the location of a first one of a plurality of reference points used in a location system has changed is provided. The reference points each have a known initial position and the method includes the steps of: estimating a channel impulse response of a wireless channel between the first reference point and a second of said plurality of reference points; determining the difference between the estimated channel impulse response and a previously-estimated channel impulse response of the wireless channel; estimating an entropy of the difference between the channel impulse responses; and determining, from said comparison, whether the location of the first reference point has changed. In another embodiment the method includes the steps of: estimating an entropy of the channel impulse response of a wireless channel between the first reference point and a second of said plurality of reference points; comparing the estimated entropy to a previously-estimated entropy for the channel impulse response of the wireless channel; determining, from said comparison, whether the location of the first reference point has changed.

    METHODS AND SYSTEMS FOR SEARCHING
    3.
    发明申请

    公开(公告)号:US20180181640A1

    公开(公告)日:2018-06-28

    申请号:US15392023

    申请日:2016-12-28

    CPC classification number: G06F16/9024 G06F16/2237

    Abstract: This invention relates to methods and systems for searching. It is particularly applicable to methods of searching which enable efficient identification of compatible portfolios. Embodiments of the invention propose methods of searching which address the huge search space issue associated with identifying compatible portfolios. In particular, embodiments of the invention start their search operations simultaneously from both sides by both trying to form valid portfolios from candidate products until a valid solution is found and trying to find conflicts from the defined compatibility rules until a conflict is found which leads to the conclusion that no valid solution exists. A conclusion from either process will stop the whole searching process which can significantly reduce blind and unnecessary searching in the whole search space. In embodiments of the invention, the two sides of the search process are also connected in a way which permits two-way communications between the processes to share information about invalid search branches during the execution of the search. The shared information is then used to direct the current and later stage of search execution. Such exchange of information can also significantly reduce the search space and create more efficient searching systems and methods, particularly by stopping search agents from carrying out invalid future searches in branches that another agent has already identified as invalid.

    METHOD AND DEVICES FOR CLOCK SYNCHRONIZATION OVER LINKS WITH ASYMMETRIC TRANSMISSION RATES
    6.
    发明申请
    METHOD AND DEVICES FOR CLOCK SYNCHRONIZATION OVER LINKS WITH ASYMMETRIC TRANSMISSION RATES 有权
    用不对称传输速率链接的时钟同步的方法和设备

    公开(公告)号:US20160170437A1

    公开(公告)日:2016-06-16

    申请号:US14566943

    申请日:2014-12-11

    Inventor: James Aweya

    CPC classification number: H04J3/0667 G06F1/10 H04B10/071

    Abstract: This invention relates to methods and devices for clock synchronization. The invention has particular application in the alignment of slave clocks to a master clock and in dealing with transmission delay asymmetries where the forward and reverse communication paths between the master and slave clocks have asymmetric transmission rates. Such methods and devices have particular application in small cell backhaul solutions for 4G/LTE deployments. In embodiments of the invention, the slave clock uses link rate information to estimate the transmission delay asymmetry and thus estimate the offset and skew of the slave clock. Embodiments provide a simple linear approximation technique and a Kalman filter-based technique for estimating offset and skew of the slave clock.

    Abstract translation: 本发明涉及时钟同步的方法和装置。 本发明特别适用于将从时钟对准主时钟,并且处理传输延迟不对称,其中主时钟和从时钟之间的正向和反向通信路径具有不对称的传输速率。 这样的方法和设备在用于4G / LTE部署的小型小区回程解决方案中具有特别的应用。 在本发明的实施例中,从时钟使用链路速率信息来估计传输延迟不对称,从而估计从时钟的偏移和偏移。 实施例提供了简单的线性近似技术和用于估计从时钟的偏移和偏移的基于卡尔曼滤波器的技术。

    Method and devices for synchronization using linear programming
    7.
    发明授权
    Method and devices for synchronization using linear programming 有权
    使用线性规划同步的方法和装置

    公开(公告)号:US09178637B2

    公开(公告)日:2015-11-03

    申请号:US14100345

    申请日:2013-12-09

    Inventor: James Aweya

    CPC classification number: H04J3/0602 H04J3/0667 H04L7/033

    Abstract: This invention relates to methods and devices for synchronization using linear programming, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a two-dimensional linear programming technique for estimating clock offset and skew, particularly from two-way exchange of timing messages between a master and a slave device. Some embodiments include a skew and offset adjustable free-running counter for regenerating the master time and frequency at the slave device.

    Abstract translation: 本发明涉及使用线性规划进行同步的方法和装置,特别是使用例如IEEE 1588精确时间协议(PTP)的分组网络。 定时协议消息暴露在网络中的伪影,例如分组延迟变化(PDV)或分组丢失。 本发明的实施例提供了一种用于估计时钟偏移和偏移的二维线性规划技术,特别是从主设备和从设备之间的定时消息的双向交换。 一些实施例包括用于在从设备处再生主时间和频率的偏斜和偏移可调自由运行计数器。

    METHOD AND DEVICES FOR PACKET SELECTION
    8.
    发明申请
    METHOD AND DEVICES FOR PACKET SELECTION 有权
    用于分组选择的方法和设备

    公开(公告)号:US20150163154A1

    公开(公告)日:2015-06-11

    申请号:US14100328

    申请日:2013-12-09

    Abstract: This invention relates to packet selection techniques that can be used in conjunction with a clock recovery mechanism to mitigate the effects of packet delay variation on timing messages exchanged over a packet network, particularly when seeking to synchronize the time of a clock in a slave device to that of a master clock. The packet selection techniques can assist in reducing the noise in the recovered clock signal at the slave device, allowing recovery to a higher quality. Embodiments of the invention provide techniques based on extracting timing packets that create a constant interval between the arrival of selected packets at the slave device and on extracting timing packets which are closest to making the interval between arrival of the selected packets equal to the interval between the departure of the packets.

    Abstract translation: 本发明涉及可以与时钟恢复机制一起使用的分组选择技术,以减轻分组延迟变化对在分组网络上交换的定时消息的影响,特别是当寻求将从设备中的时钟的时间同步到 一个主时钟。 分组选择技术可以帮助减少从设备恢复的时钟信号中的噪声,从而允许恢复到更高的质量。 本发明的实施例提供了基于提取在从设备的所选分组到达之间创建恒定间隔的定时分组的技术,以及提取最接近于使所选分组的到达之间的间隔等于所述分组之间的间隔的定时分组 包的离开

    METHOD AND DEVICES FOR FREQUENCY DISTRIBUTION
    9.
    发明申请
    METHOD AND DEVICES FOR FREQUENCY DISTRIBUTION 有权
    用于频率分配的方法和设备

    公开(公告)号:US20150071309A1

    公开(公告)日:2015-03-12

    申请号:US14023815

    申请日:2013-09-11

    Abstract: This invention relates to methods and devices for frequency distribution based on, for example, the IEEE 1588 Precision Time Protocol (PTP). Packet delay variation (PDV) is a direct contributor to the noise in the recovered clock and various techniques have been proposed to mitigate its effects. Embodiments of the invention provide a mechanism to directly measure and remove PDV effects in the clock recovery mechanism at a slave clock. One particular embodiment provides a clock recovery mechanism including a phase-locked loop (PLL) with a PDV compensation feature built-in. An aim of the invention is to enable a slave clock to recover the master clock to a higher quality as if the communication path between master and slave is free of PDV. This technique may allow a packet network to provide clock synchronization services to the same level as time division multiplexing (TDM) networks and Global Positioning System (GPS).

    Abstract translation: 本发明涉及基于例如IEEE 1588精确时间协议(PTP)的用于频率分布的方法和装置。 分组延迟变化(PDV)是恢复时钟中的噪声的直接贡献者,并且已经提出了各种技术来减轻其影响。 本发明的实施例提供了一种在从时钟处直接测量和去除时钟恢复机制中的PDV效应的机制。 一个具体实施例提供了一种时钟恢复机制,其包括具有内置PDV补偿特征的锁相环(PLL)。 本发明的目的是使从时钟将主时钟恢复到更高的质量,就好像主机和从机之间的通信路径没有PDV一样。 该技术可以允许分组网络提供与时分复用(TDM)网络和全球定位系统(GPS)相同级别的时钟同步服务。

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