Architecture for real-time extraction of extended maximally stable extremal regions (X-MSERs)

    公开(公告)号:US09600739B2

    公开(公告)日:2017-03-21

    申请号:US14686905

    申请日:2015-04-15

    CPC classification number: G06K9/4671

    Abstract: Architecture for real-time extraction of maximally stable extremal regions (MSERs) is disclosed. The architecture includes communication interface and processing circuitry that is adapted in hardware to receive a data streams of an intensity image and a depth image in real-time and provide intensity labels for image regions within the intensity image that match a given intensity threshold and provide depth labels for image regions within the depth image that match a given depth threshold. The processing circuitry is also adapted in hardware to find intensity extremal regions within the intensity image based upon the intensity labels and to find depth extremal regions within the depth image based upon the depth labels. The processing circuitry determines strong extremal regions based upon significant overlap between the intensity extremal regions and depth extremal regions. The processing circuitry then determines X-MSER ellipses parameters based upon the strong extremal regions and X-MSER criteria.

    HARDWARE ARCHITECTURE FOR REAL-TIME EXTRACTION OF MAXIMALLY STABLE EXTREMAL REGIONS (MSERs)
    8.
    发明申请
    HARDWARE ARCHITECTURE FOR REAL-TIME EXTRACTION OF MAXIMALLY STABLE EXTREMAL REGIONS (MSERs) 有权
    用于实时提取最大稳定区域的硬件架构(MSER)

    公开(公告)号:US20160071280A1

    公开(公告)日:2016-03-10

    申请号:US14482482

    申请日:2014-09-10

    Abstract: Hardware architecture for real-time extraction of maximally stable extremal regions (MSERs) is disclosed. The architecture includes a communication interface and processing circuitry that are configured in hardware to receive a data stream of an intensity image in real-time and provide labels for image regions within the intensity image that match a given intensity threshold. The communication interface and processing circuitry are also configured in hardware to find extremal regions within the intensity image based upon the labels and to determine MSER ellipses parameters based upon the extremal regions and MSER criteria. In at least one embodiment, the MSER criteria include minimum and maximum MSER areas, and an acceptable growth rate value for MSER area. In another embodiment, the MSER criteria include a nested MSER tolerance value.

    Abstract translation: 公开了用于实时提取最大稳定极值区域(MSER)的硬件架构。 该架构包括通信接口和处理电路,其被配置成硬件以实时地接收强度图像的数据流,并且提供与强度图像内匹配给定强度阈值的图像区域的标签。 通信接口和处理电路也被配置在硬件中以基于标签找到强度图像内的极值区域,并且基于极值区域和MSER标准来确定MSER椭圆参数。 在至少一个实施例中,MSER标准包括MSER区域的最小和最大MSER区域以及可接受的生长速率值。 在另一个实施例中,MSER标准包括嵌套的MSER容差值。

    Method and devices for frequency distribution
    9.
    发明授权
    Method and devices for frequency distribution 有权
    频率分配方法和装置

    公开(公告)号:US09112631B2

    公开(公告)日:2015-08-18

    申请号:US14023815

    申请日:2013-09-11

    Abstract: This invention relates to methods and devices for frequency distribution based on, for example, the IEEE 1588 Precision Time Protocol (PTP). Packet delay variation (PDV) is a direct contributor to the noise in the recovered clock and various techniques have been proposed to mitigate its effects. Embodiments of the invention provide a mechanism to directly measure and remove PDV effects in the clock recovery mechanism at a slave clock. One particular embodiment provides a clock recovery mechanism including a phase-locked loop (PLL) with a PDV compensation feature built-in. An aim of the invention is to enable a slave clock to recover the master clock to a higher quality as if the communication path between master and slave is free of PDV. This technique may allow a packet network to provide clock synchronization services to the same level as time division multiplexing (TDM) networks and Global Positioning System (GPS).

    Abstract translation: 本发明涉及基于例如IEEE 1588精确时间协议(PTP)的用于频率分布的方法和装置。 分组延迟变化(PDV)是恢复时钟中的噪声的直接贡献者,并且已经提出了各种技术来减轻其影响。 本发明的实施例提供了一种在从时钟处直接测量和去除时钟恢复机制中的PDV效应的机制。 一个具体实施例提供了一种时钟恢复机制,其包括具有内置PDV补偿特征的锁相环(PLL)。 本发明的目的是使从时钟将主时钟恢复到更高的质量,就好像主机和从机之间的通信路径没有PDV一样。 该技术可以允许分组网络提供与时分复用(TDM)网络和全球定位系统(GPS)相同级别的时钟同步服务。

    METHOD AND DEVICES FOR SYNCHRONIZATION USING LINEAR PROGRAMMING
    10.
    发明申请
    METHOD AND DEVICES FOR SYNCHRONIZATION USING LINEAR PROGRAMMING 有权
    使用线性编程进行同步的方法和设备

    公开(公告)号:US20150163000A1

    公开(公告)日:2015-06-11

    申请号:US14100345

    申请日:2013-12-09

    Inventor: James Aweya

    CPC classification number: H04J3/0602 H04J3/0667 H04L7/033

    Abstract: This invention relates to methods and devices for synchronization using linear programming, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a two-dimensional linear programming technique for estimating clock offset and skew, particularly from two-way exchange of timing messages between a master and a slave device. Some embodiments include a skew and offset adjustable free-running counter for regenerating the master time and frequency at the slave device.

    Abstract translation: 本发明涉及使用线性规划进行同步的方法和装置,特别是使用例如IEEE 1588精确时间协议(PTP)的分组网络。 定时协议消息暴露在网络中的伪影,例如分组延迟变化(PDV)或分组丢失。 本发明的实施例提供了一种用于估计时钟偏移和偏移的二维线性规划技术,特别是从主设备和从设备之间的定时消息的双向交换。 一些实施例包括用于在从设备处再生主时间和频率的偏斜和偏移可调自由运行计数器。

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