公开(公告)号：US09206431B2

公开(公告)日：2015-12-08

申请号：US11862900

申请日：2007-09-27

Applicant: Po-Huang Liang ,  Hui-Min Wang ,  Yan-Ping Shih

Inventor： Po-Huang Liang ,  Hui-Min Wang ,  Yan-Ping Shih

IPC: C12N9/50 ,  C12N15/62 ,  C12N15/70 ,  C12N15/81

CPC classification number: C12N15/62 ,  C07K2319/20 ,  C07K2319/21 ,  C07K2319/23 ,  C12N15/70 ,  C12N15/81

Abstract: This invention features a kit containing multiple expression vectors for producing tag-cleavable fusion proteins in various expression systems, or for producing fusion proteins in E. coli inclusion bodies.

Abstract translation: 本发明的特征在于包含多种表达载体的试剂盒，用于在各种表达系统中产生标签可切割的融合蛋白，或用于在大肠杆菌包涵体中产生融合蛋白。

公开(公告)号：US09173969B2

公开(公告)日：2015-11-03

申请号：US13443996

申请日：2012-04-11

Applicant: Hui-Min Wang ,  Mei-Ling Ho ,  Gwo-Jaw Wang ,  Je-Ken Chang ,  Yi-Ting Chou ,  Ching-Ying Wu ,  Su-Shin Lee

Inventor： Hui-Min Wang ,  Mei-Ling Ho ,  Gwo-Jaw Wang ,  Je-Ken Chang ,  Yi-Ting Chou ,  Ching-Ying Wu ,  Su-Shin Lee

IPC: A61L15/28 ,  A61L27/38 ,  A61L27/60 ,  A61L15/32 ,  A61L15/42

CPC classification number: A61L15/28 ,  A61L15/32 ,  A61L15/325 ,  A61L15/425 ,  A61L27/3813 ,  A61L27/3886 ,  A61L27/60 ,  C08L5/08

Abstract: The present invention provides a biomaterial comprising a scaffold consisting of collagen, hyaluronic acid, and gelatin, which are cross-linked via ethyl-3-[3-dimethylaminopropyl]carbodiimide (EDC) between any two of collagen, hyaluronic acid, and gelatin. The present invention further provides a method for preparing the biomaterial and a method for enhancing wound healing with the biomaterial.

Abstract translation: 本发明提供一种生物材料，其包含由胶原，透明质酸和明胶组成的支架，其通过任何两种胶原，透明质酸和明胶之间的乙基-3- [3-二甲基氨基丙基]碳二亚胺（EDC）进行交联。 本发明还提供了一种用于制备生物材料的方法和用生物材料增强伤口愈合的方法。

公开(公告)号：US20110095737A1

公开(公告)日：2011-04-28

申请号：US12606468

申请日：2009-10-27

Applicant: Yuan-Kai Chu ,  Hui-Min Wang

Inventor： Yuan-Kai Chu ,  Hui-Min Wang

IPC: G05F1/10

CPC classification number: G05F1/575

Abstract: A voltage regulator and an integrated circuit using the voltage regulator is provided. The voltage regulator has a bandgap reference circuit, an operational amplifier, a power transistor and a voltage divider. The bandgap reference circuit generates a bandgap reference voltage. The operational amplifier receives the bandgap reference voltage and a feedback voltage to output a control signal for the power transistor. The power transistor is powered by a first voltage source and transforms the first voltage source to a second voltage source according to the control signal. The second voltage source is divided by the voltage divider to generate the feedback voltage and is further used in powering the bandgap reference circuit and the operational amplifier.

Abstract translation: 提供了使用电压调节器的电压调节器和集成电路。 电压调节器具有带隙参考电路，运算放大器，功率晶体管和分压器。 带隙参考电路产生带隙参考电压。 运算放大器接收带隙参考电压和反馈电压以输出功率晶体管的控制信号。 功率晶体管由第一电压源供电，并根据控制信号将第一电压源转换为第二电压源。 第二电压源由分压器分压以产生反馈电压，并进一步用于为带隙基准电路和运算放大器供电。

公开(公告)号：US20100187227A1

公开(公告)日：2010-07-29

申请号：US12358569

申请日：2009-01-23

Applicant: Hui-Min WANG

Inventor： Hui-Min WANG

IPC: B65D6/16

CPC classification number: B65D11/1853 ,  B65D25/2808 ,  B65D25/54

Abstract: A fully foldable storage box includes a soft bottom, and four hard side boards perpendicularly coupled to four edges of the bottom, and edges of the side boards are connected with each other to constitute a structure having a first folding line along each of four edge corners of the storage box, and a second folding line is disposed perpendicularly at the middle of two selected corresponding lateral boards and a third folding line is disposed perpendicularly at a side of the two lateral boards and proximate to the rear board, such that support strips are formed between the two lateral boards and the rear board respectively, and a liftable hard bottom board is coupled to an internal bottom edge of the rear board, so that and the bottom board can be stacked onto the soft bottom to constitute a fully foldable storage box.

Abstract translation: 完全可折叠的存储箱包括软底部和四个垂直耦合到底部的四个边缘的硬质侧板，并且侧板的边缘彼此连接以构成具有沿着四个边角中的每一个的第一折叠线的结构 并且第二折叠线垂直设置在两个所选择的对应侧板的中间，并且第三折叠线垂直设置在两个侧板的一侧并且靠近后板，使得支撑条是 分别形成在两个侧板和后板之间，并且可升降的硬底板联接到后板的内部底部边缘，使得底板可以堆叠在软底部上以构成完全可折叠的存储箱 。

公开(公告)号：US20100134470A1

公开(公告)日：2010-06-03

申请号：US12327376

申请日：2008-12-03

Applicant: Lin-Kai Bu ,  Hui-Min Wang

Inventor： Lin-Kai Bu ,  Hui-Min Wang

IPC: G06F3/038 ,  G09G3/28

CPC classification number: G09G3/3688 ,  G09G3/3696 ,  G09G2320/0276

Abstract: A source driving circuit includes a gamma voltage generator, a common voltage generator and a driver. The gamma voltage generator receives gamma data from a timing controller through reduced swing differential signaling (RSDS) transmission interface to generate corresponding gamma voltages. The common voltage generator receives common voltage data from the timing controller to generate a corresponding common voltage. The driver receives image data from the timing controller through the RSDS transmission interface, the gamma voltages from the gamma voltage generator and the common voltage from the common voltage generator for modifying the image data using the gamma voltages and the common voltage and transmitting the modified image data to a panel of the liquid crystal display.

Abstract translation: 源极驱动电路包括伽马电压发生器，公共电压发生器和驱动器。 伽马电压发生器通过减小的摆幅差分信号（RSDS）传输接口从定时控制器接收伽马数据，以产生相应的伽马电压。 公共电压发生器从定时控制器接收公共电压数据以产生相应的公共电压。 驱动器通过RSDS传输接口从定时控制器接收图像数据，伽马电压发生器的伽马电压和来自公共电压发生器的公共电压，以使用伽马电压和公共电压修改图像数据，并发送修改的图像 数据到液晶显示器的面板。

公开(公告)号：US20100038991A1

公开(公告)日：2010-02-18

申请号：US12232033

申请日：2008-09-10

Applicant: Wen-Ching Shih ,  Hui-Min Wang

Inventor： Wen-Ching Shih ,  Hui-Min Wang

IPC: H01L41/04

CPC classification number: H03H3/10 ,  H03H9/02574

Abstract: A high frequency SAW device and the substrate thereof are disclosed. The disclosed high frequency SAW device does not need to use the conventional and expensive sapphire substrate as its substrate. Besides, the disclosed substrate for a high-frequency SAW device can replace the conventional sapphire substrate in the use of the substrate for a high frequency SAW device. The disclosed high frequency SAW device comprises: a substrate; a first buffering layer forming on the surface of the substrate; a second buffering layer forming on the surface of the first buffering layer; a piezoelectric layer forming on the surface of the second buffering layer; an input transformation unit; and an output transformation unit, wherein the input transformation unit and the output transformation unit are formed in pairs on the surface of or beneath the piezoelectric layer.

公开(公告)号：US20090092211A1

公开(公告)日：2009-04-09

申请号：US11905797

申请日：2007-10-04

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H04L7/00

CPC classification number: H04L7/0331 ,  H03L7/0814 ,  H04L7/0008 ,  H04L7/0041

Abstract: A method for adjusting a serial data signal having multiple sets of bits includes the following steps. First, one set of bits in the serial data signal is over-sampled to generate a first set of over-sampled bits. Next, every adjacent two bits of the first set of over-sampled bits are compared to generate one set of edge bits. Then, a delay operation is determined according to the set of edge bits. Afterwards, a displacement operation is executed on next sets of bits in the serial data signal according to the delay operation.

Abstract translation: 一种用于调整具有多组位数的串行数据信号的方法包括以下步骤。 首先，串行数据信号中的一组位被过采样以产生第一组过采样位。 接下来，比较第一组过采样比特的每个相邻的两比特以产生一组边缘比特。 然后，根据边缘位的集合来确定延迟操作。 然后，根据延迟动作对串行数据信号中的下一组位执行位移动作。

公开(公告)号：US20080109787A1

公开(公告)日：2008-05-08

申请号：US11936089

申请日：2007-11-07

Applicant: Hui-Min Wang ,  Hung-Lin Chou ,  Chia-Ching Lin

Inventor： Hui-Min Wang ,  Hung-Lin Chou ,  Chia-Ching Lin

IPC: G06F9/44

CPC classification number: G06F8/33

Abstract: A function reference method of a development tool and a system thereof are disclosed. According to the function reference method, new function database and classified data are described with a text file or a database format file. After the file is read by an add-in module of the development tool, the desired function or object can be loaded into the editing workspace of the development tool through a hierarchical menu or by detecting an input string. Therefore, users can quickly searching and loading new functions.

Abstract translation: 公开了一种开发工具及其系统的功能参考方法。 根据功能参考方法，使用文本文件或数据库格式文件描述新功能数据库和分类数据。 在通过开发工具的附加模块读取文件之后，期望的功能或对象可以通过分层菜单或通过检测输入字符串被加载到开发工具的编辑工作空间中。 因此，用户可以快速搜索和加载新功能。

公开(公告)号：US20070210846A1

公开(公告)日：2007-09-13

申请号：US11371927

申请日：2006-03-10

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H03H11/26

CPC classification number: H03K5/135 ,  H03K2005/00078

Abstract: The present invention provides a digital circuit comprising an inverter gate delay line and a delay adjustment circuit. The inverter gate delay line comprises a series of a plurality of inverter gates that receives a serial data. The delay adjustment circuit comprises a replica inverter gate delay line comprising a series of a plurality of inverter gates and being configured to receive a first signal, a plurality of flip flops, each one of the plurality of flip flops electrically connected to the corresponding inverter gates of the replica inverter gate delay line, wherein the plurality of flip flops store binary information and the first flip flop of the plurality of flip flops receives a second signal which has a time delay with respect to the first signal, an encoder being electrically connected to the plurality of flip flops and determining the numbers of the needed inverter gates of the inverter gate delay line based on the binary information stored in the plurality of flip flops, and a delay selector being electrically connected to the encoder and the plurality of inverter gates of the inverter gate delay line and causing the serial data delayed by the inverter gates of the inverter gate delay line, wherein the numbers of the inverter gates of the inverter gate delay line are determined by an output of the encoder.

Abstract translation: 本发明提供一种数字电路，包括反相门延迟线和延迟调整电路。 逆变器门延迟线包括一系列接收串行数据的反相器门。 延迟调整电路包括复制反相器门延迟线，其包括一系列多个反相器门，并且被配置为接收第一信号，多个触发器，多个触发器中的每一个电连接到相应的反相器门 其中所述多个触发器存储二进制信息，并且所述多个触发器中的第一触发器接收相对于所述第一信号具有时间延迟的第二信号，编码器电连接到 多个触发器，并且基于存储在多个触发器中的二进制信息确定反相器门延迟线所需的反相器门的数量;以及延迟选择器，电连接到编码器和多个反相器门 逆变器门延迟线并使逆变器门延迟线延迟的串行数据延迟，其中 逆变器门延迟线的反相器门数由编码器的输出决定。

公开(公告)号：US20060239383A1

公开(公告)日：2006-10-26

申请号：US11160526

申请日：2005-06-28

Applicant: Hui-Min Wang ,  Chung-Ming Huang ,  Lin-Kai Bu

Inventor： Hui-Min Wang ,  Chung-Ming Huang ,  Lin-Kai Bu

IPC: H04L27/00 ,  H04L7/02

CPC classification number: H04L5/023 ,  H04L7/0008 ,  H04L7/033

Abstract: A multi-channel receiver, digital edge tuning circuit and a method for operating the same is disclosed. The digital edge tuning circuit for tuning phases of an input signal and a clock signal, comprises a delay-tuning circuit for receiving the input signal and delaying the input signal to generate a fine-tuned signal; a delay set comprising a plurality of delays connected serially one by one, the input of the delay set coupled to the fine-tune circuit, for receiving the fine-tuned signal; a plurality of sample/hold circuits, each of the sample/hold circuits coupled to a corresponding output of one of the delays and the fine-tune circuit, for sampling and holding the corresponding output; and a dynamic edge tuning circuit, coupled to the sample/hold circuits, for controlling a common delay time delayed by the delay-tuning circuit according to which one of the sample/hold circuits samples a data edge of the input signal.

Abstract translation: 公开了一种多通道接收机，数字边缘调谐电路及其操作方法。 用于调谐输入信号和时钟信号的相位的数字边沿调谐电路包括延迟调谐电路，用于接收输入信号并延迟输入信号以产生微调信号; 延迟集合，包括串联地逐个连接的多个延迟，耦合到微调电路的延迟集合的输入，用于接收微调信号; 多个采样/保持电路，每个采样/保持电路耦合到延迟中的一个的对应输出和微调电路，用于采样和保持相应的输出; 以及耦合到采样/保持电路的动态边沿调谐电路，用于根据哪个采样/保持电路对输入信号的数据沿进行采样来控制由延迟调谐电路延迟的公共延迟时间。