公开(公告)号：USD931015S1

公开(公告)日：2021-09-21

申请号：US29696147

申请日：2019-06-25

申请人： Jae Duk Lee

设计人： Jae Duk Lee

公开(公告)号：US10115799B2

公开(公告)日：2018-10-30

申请号：US15408017

申请日：2017-01-17

申请人： Jin Taek Park ,  Young Woo Park ,  Jae Duk Lee

发明人： Jin Taek Park ,  Young Woo Park ,  Jae Duk Lee

IPC分类号： H01L29/51 ,  H01L29/66 ,  H01L29/778 ,  H01L29/792 ,  H01L27/11556 ,  H01L27/11582 ,  G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49

摘要： There is provided a method of manufacturing a non-volatile memory device including: alternatively stacking a plurality of insulating layers and a plurality of conductive layers on a top surface of a substrate; forming an opening that exposes the top surface of the substrate and lateral surfaces of the insulating layers and the conductive layers; forming an anti-oxidation layer on at least the exposed lateral surfaces of the conductive layers; forming a gate dielectric layer on the anti-oxidation layer, the gate dielectric layer including a blocking layer, an electric charge storage layer, and a tunneling layer that are sequentially formed on the anti-oxidation layer; and forming a channel region on the tunneling layer.

公开(公告)号：US20170229476A1

公开(公告)日：2017-08-10

申请号：US15485334

申请日：2017-04-12

申请人： Jong-Won KIM ,  Chang-Seok KANG ,  Young-Woo PARK ,  Jae-Goo LEE ,  Jae-Duk LEE

发明人： Jong-Won KIM ,  Chang-Seok KANG ,  Young-Woo PARK ,  Jae-Goo LEE ,  Jae-Duk LEE

IPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L23/528 ,  H01L27/1157

CPC分类号： H01L27/11582 ,  H01L23/5283 ,  H01L27/11565 ,  H01L27/1157

摘要： A non-volatile memory device is provided. The non-volatile memory device includes a channel structure that is located on a substrate and extends perpendicularly to the substrate, a conductive pattern that extends perpendicularly to the substrate and is spaced apart from the channel structure, an electrode structure that is located between the channel structure and the conductive pattern, and comprises a plurality of gate patterns and a plurality of insulation patterns that are alternately laminated. An insulating layer that contacts with a top surface of the conductive pattern is formed along side surfaces of the electrode structure. The top surface of the conductive pattern is formed to be lower than the top surface of the channel structure.

公开(公告)号：US20170092651A1

公开(公告)日：2017-03-30

申请号：US15264902

申请日：2016-09-14

申请人： Jong-Won KIM ,  Chang-Seok KANG ,  Young-Woo PARK ,  Jae-Goo LEE ,  Jae-Duk LEE

发明人： Jong-Won KIM ,  Chang-Seok KANG ,  Young-Woo PARK ,  Jae-Goo LEE ,  Jae-Duk LEE

IPC分类号： H01L27/115

CPC分类号： H01L27/1157 ,  H01L27/11582

摘要： A non-volatile memory device is provided. The non-volatile memory device includes a channel structure that is located on a substrate and extends perpendicularly to the substrate, a conductive pattern that extends perpendicularly to the substrate and is spaced apart from the channel structure, an electrode structure that is located between the channel structure and the conductive pattern, and comprises a plurality of gate patterns and a plurality of insulation patterns that are alternately laminated. An insulating layer that contacts with a top surface of the conductive pattern is formed along side surfaces of the electrode structure. The top surface of the conductive pattern is formed to be lower than the top surface of the channel structure.

公开(公告)号：US09318329B2

公开(公告)日：2016-04-19

申请号：US14272237

申请日：2014-05-07

申请人： Kanamori Kohji ,  Young-Woo Park ,  Jin-Taek Park ,  Jae-Duk Lee

发明人： Kanamori Kohji ,  Young-Woo Park ,  Jin-Taek Park ,  Jae-Duk Lee

IPC分类号： H01L21/02 ,  H01L21/28 ,  H01L27/115 ,  H01L29/66 ,  H01L29/792

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： Methods of fabricating a vertical cell semiconductor device including forming a hole passing through a stacked structure of alternating insulating and sacrificial layers on a substrate, forming an amorphous silicon layer conforming to an inner wall of the hole, forming a silicon region on the amorphous silicon layer, and metal induced crystallizing the amorphous silicon layer via the silicon region to form a single-crystalline channel structure in the hole.

摘要翻译： 制造垂直单元半导体器件的方法包括在衬底上形成通过交替的绝缘层和牺牲层的层叠结构的孔，形成与孔的内壁一致的非晶硅层，在非晶硅层上形成硅区 并且金属诱导通过硅区域结晶非晶硅层以在孔中形成单晶通道结构。

公开(公告)号：US20150380431A1

公开(公告)日：2015-12-31

申请号：US14642086

申请日：2015-03-09

申请人： KOHJI KANAMORI ,  CHUNG-JIN KIM ,  YOUNG-WOO PARK ,  JAE-GOO LEE ,  JAE-DUK LEE ,  MOO-RYM CHOI

发明人： KOHJI KANAMORI ,  CHUNG-JIN KIM ,  YOUNG-WOO PARK ,  JAE-GOO LEE ,  JAE-DUK LEE ,  MOO-RYM CHOI

IPC分类号： H01L27/115 ,  H01L23/528 ,  H01L23/532 ,  H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

摘要： A semiconductor device is provided. Word lines are formed on a substrate. An air gap is interposed between two adjacent word lines. A channel structure penetrates through the word lines and the air gap. A memory cell is interposed between each word line and the channel structure. The memory cell includes a blocking pattern, a charge trap pattern and a tunneling insulating pattern. The blocking pattern conformally covers a top surface, a bottom surface, and a first side surface of each word line. The first side surface is adjacent to the channel structure. The charge trap pattern is interposed only between the first side surface and the channel structure.

摘要翻译： 提供半导体器件。 字线形成在基板上。 在两个相邻字线之间插入气隙。 通道结构穿过字线和气隙。 存储单元插入在每个字线和通道结构之间。 存储单元包括阻挡图案，电荷陷阱图案和隧道绝缘图案。 阻挡图案保形地覆盖每个字线的顶表面，底表面和第一侧表面。 第一侧表面与通道结构相邻。 电荷陷阱图案仅插入在第一侧表面和沟道结构之间。

公开(公告)号：US20060027859A1

公开(公告)日：2006-02-09

申请号：US11247814

申请日：2005-10-11

申请人： Jae-Duk Lee ,  Dong-gun Park ,  Jeong-Hyuk Choi

发明人： Jae-Duk Lee ,  Dong-gun Park ,  Jeong-Hyuk Choi

IPC分类号： H01L29/788

CPC分类号： H01L21/28273 ,  H01L29/42324 ,  H01L29/42336 ,  H01L29/7883

摘要： In a floating gate memory cell including a floating gate separated from an active region by a tunnel isolation region, a first one of the active region and the floating gate comprises a portion that protrudes towards a second one of the active region and the floating gate. In some embodiments, the protruding portion tapers toward the second one of the active region and the floating gate. The tunnel insulation layer may be narrowed at the protruding portion. Protruding portions may be formed on both the floating gate and the active region.

摘要翻译： 在包括通过隧道隔离区域与有源区域分离的浮动栅极的浮动栅极存储单元中，有源区域和浮置栅极中的第一个包括朝向有源区域和浮置栅极中的第二个突出的部分。 在一些实施例中，突出部分朝向有源区域和浮动栅极中的第二个逐渐变细。 隧道绝缘层可以在突出部分变窄。 突出部分可以形成在浮动栅极和有源区域两者上。

公开(公告)号：US06528841B2

公开(公告)日：2003-03-04

申请号：US09995501

申请日：2001-11-26

申请人： Eun-Young Choi ,  Jung-Dal Choi ,  Jae-Duk Lee ,  Hong-Soo Kim

发明人： Eun-Young Choi ,  Jung-Dal Choi ,  Jae-Duk Lee ,  Hong-Soo Kim

IPC分类号： H01L29788

CPC分类号： H01L27/115

摘要： A NAND type flash memory device has a dummy region forming a dummy pattern. In the flash memory device, a common source line is formed to cross only with an isolation layer adjacent an active region of a normal pattern forming memory cells.

公开(公告)号：US6070289A

公开(公告)日：2000-06-06

申请号：US80246

申请日：1998-05-18

申请人： Nam-Ho Lee ,  Jae-Duk Lee

发明人： Nam-Ho Lee ,  Jae-Duk Lee

IPC分类号： A47L9/00 ,  A47L9/22

CPC分类号： A47L9/0081 ,  A47L9/22

摘要： A low noise vacuum cleaner is comprised of a dust collecting chamber having a paper filter, and air blowing chamber partitioned by a wall. The air blowing chamber comprises an air suction motor, a front casing, a rear casing having space established by assembling with the front casing, and the motor being housed in the space, and a first and a second air guiders which are housed in the rear casing. A periphery of the second air guider is sealedly disposed between the joint portion of the front casing and the rear casing.

摘要翻译： 低噪音的真空吸尘器由具有纸过滤器的集尘室和由壁隔开的送风室构成。 吹风室包括吸气马达，前壳体，具有通过与前壳体组装而建立的空间的后壳体，以及容纳在该空间中的马达，以及容纳在后部的第一和第二空气引导器 套管。 第二空气引导件的周边密封地设置在前壳体的接合部分和后壳体之间。