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    SINGLE INDUCTOR MULTIPLE OUTPUT SWITCHING DEVICES
    32.
    发明申请
    SINGLE INDUCTOR MULTIPLE OUTPUT SWITCHING DEVICES 有权
    单电感多输出开关装置

    公开(公告)号：US20100026267A1

    公开(公告)日：2010-02-04

    申请号：US12463388

    申请日：2009-05-09

    Applicant: Prakash EASWARAN ,  Rupak GHAYAL ,  Raghavendra Rao HARESAMUDRAM

    Inventor： Prakash EASWARAN ,  Rupak GHAYAL ,  Raghavendra Rao HARESAMUDRAM

    IPC: G05F1/10

    CPC classification number: H02M3/158 ,  H02M2001/009

    Abstract: Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.

    Abstract translation: 具有高效调节电路的单电感多输出（SIMO）开关器件。 SIMO切换装置包括用于切换通过SIMO切换装置的电感器的电流的多个时分复用（TDM）开关。 多个TDM交换机产生多个输出。 SIMO切换装置还包括可操作地耦合到多个输出的误差计算电路，用于从多个输出中确定计算出的误差; 时隙生成电路，用于根据计算出的误差来控制多个TDM交换机; 以及可操作地耦合到所述时隙产生电路的脉冲宽度调制（PWM）控制电路，用于在连续导通模式（CCM）中控制所述SIMO开关器件的开关级的多个PWM开关。 PWM开关根据时隙发生电路产生的时隙进行控制。

    Reducing noise and distortion in a receiver system
    36.
    发明授权
    Reducing noise and distortion in a receiver system 有权
    降低接收机系统的噪声和失真

    公开(公告)号：US07177613B2

    公开(公告)日：2007-02-13

    申请号：US10711680

    申请日：2004-09-30

    Applicant: Anant Shankar Kamath ,  Gaurav Chandra ,  Prakash Easwaran

    Inventor： Anant Shankar Kamath ,  Gaurav Chandra ,  Prakash Easwaran

    IPC: H04B15/00 ,  H04B1/10

    CPC classification number: H04B1/30 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45136 ,  H03F2203/45526

    Abstract: A receiver, implemented with low noise and low distortion, to process an input signal containing signals of interest and unwanted interference signal. In an embodiment, the receiver contains a mixer which generates an intermediate signal in the form of an electric current, and a filter which filters the unwanted interference signals from the intermediate signal. The intermediate signal is centered around a lower frequency compared to a carrier frequency of the input signal. Due to the current mode interface between the mixer and the filter circuit, low noise and low distortion may be attained.

    Abstract translation: 以低噪声和低失真实现的接收机，用于处理包含感兴趣信号和不想要的干扰信号的输入信号。 在一个实施例中，接收机包含以电流形式产生中间信号的混频器和从中间信号滤除不想要的干扰信号的滤波器。 与输入信号的载波频率相比，中间信号以较低的频率为中心。 由于混频器和滤波器电路之间的电流模式接口，可以获得低噪声和低失真。

    Filter circuit providing low distortion and enhanced flexibility to obtain variable gain amplification
    37.
    发明授权
    Filter circuit providing low distortion and enhanced flexibility to obtain variable gain amplification 有权
    滤波电路提供低失真和增强的灵活性，以获得可变增益放大

    公开(公告)号：US07138873B2

    公开(公告)日：2006-11-21

    申请号：US10904578

    申请日：2004-11-17

    Applicant: Gaurav Chandra ,  Prakash Easwaran ,  Sumantra Seth

    Inventor： Gaurav Chandra ,  Prakash Easwaran ,  Sumantra Seth

    IPC: H03F3/04

    CPC classification number: H03F1/34 ,  H03G3/3052 ,  H03G5/24 ,  H03H11/126 ,  H03H11/1291

    Abstract: A low distortion filter circuit implementing variable gain amplification (VGA). An aspect of the present invention increases the degrees of freedom (number of components which can be independently programmed/changed to corresponding desired values) to achieve a desired combination of D.C. gain and filter characteristics (e.g., corner frequency, Q-factor, notch frequency, etc.). Such additional degrees of freedom are attained by including additional components in either on input block or a feedback block (implemented with reference to an operational amplifier), and by redesigning the other block using principles such as admittance concellation to remove the effects of such additional components. The blocks are designed such that a terminal of the programmable components is connected to a fixed/constant voltage (e.g., ground). Embodiments implementing bi-quad single amplifier with and without notch are disclosed.

    Abstract translation: 实现可变增益放大（VGA）的低失真滤波电路。 本发明的一个方面增加了自由度（可以被独立地编程/改变为相应的期望值的分量的数量），以实现期望的DC增益和滤波器特性的组合（例如，转角频率，Q因子，陷波频率 等）。 通过将附加组件包括在输入块或反馈块（参考运算放大器实现）中并且通过使用诸如导纳协调之类的原理重新设计其他块来消除这些附加组件的影响来实现这样的附加自由度 。 这些块被设计成使得可编程组件的端子连接到固定/恒定电压（例如，接地）。 公开了实现具有和没有陷波的双二极管单放大器的实施例。

    Device and method of digital gain programming using sigma-delta modulator
    39.
    发明授权
    Device and method of digital gain programming using sigma-delta modulator 有权

    公开(公告)号：US06804291B1

    公开(公告)日：2004-10-12

    申请号：US09510085

    申请日：2000-02-22

    Applicant: Prakash Easwaran ,  Mrinal Das

    Inventor： Prakash Easwaran ,  Mrinal Das

    IPC: H04B138

    CPC classification number: H03M7/3015 ,  H03M7/3026 ,  H03M7/304

    Abstract: A sigma delta modulator (350) can be utilized in the Digital-to-Analog (DAC) portion (144) of a modem (120) to achieve a desired level of gain programming. A set of step coefficients (GP2, GP4) are utilized to determined the step size and thereby the overall gain of the modulator (350). A feedback path is provided and configured to deliver the output of the modulator to a gain control block (355) which provides control and stability across the entire transmission bandwidth. A multilevel digital output (320) is provided which represents levels of signal in the digital domain and reduces the number of discrete components required to achieve a particular amount of gain.

    Trimming impedance between two nodes connected to a non-fixed voltage level
    40.
    发明授权
    Trimming impedance between two nodes connected to a non-fixed voltage level 有权
    连接到非固定电压电平的两个节点之间的微调阻抗

    公开(公告)号：US06642779B2

    公开(公告)日：2003-11-04

    申请号：US10080535

    申请日：2002-02-25

    Applicant: Prakash Easwaran ,  Sandeep Oswal ,  Naom Chaplik

    Inventor： Prakash Easwaran ,  Sandeep Oswal ,  Naom Chaplik

    IPC: H03B520

    CPC classification number: H03H7/25 ,  H03J1/00

    Abstract: A T-network containing three impedances is provided between two terminating ends connected to a non-fixed voltage level. Two impedances are connected in series between the two terminating ends. A third impedance is connected between the junction of the first two impedances and a fixed voltage. Switches may be used to trim the third impedance, thus obtaining a desired voltage between the two terminating ends. A terminal of any switches used for trimming can be connected to the fixed voltage node, thereby ensuring that the impedance introduced by the switches does not change substantially during different operating situations.

    Abstract translation: 在连接到非固定电压电平的两个终端之间提供包含三个阻抗的T网络。 两个阻抗串联在两个端接端之间。 第三阻抗连接在前两个阻抗的结点和固定电压之间。 可以使用开关来修整第三阻抗，从而在两个端接端之间获得期望的电压。 用于修整的任何开关的端子可以连接到固定电压节点，从而确保在不同的操作情况下由开关引入的阻抗基本上没有变化。

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