CMOS image sensor and image signal detecting method thereof
    32.
    发明授权
    CMOS image sensor and image signal detecting method thereof 有权
    CMOS图像传感器及其图像信号检测方法

    公开(公告)号:US07985993B2

    公开(公告)日:2011-07-26

    申请号:US11874404

    申请日:2007-10-18

    CPC classification number: H04N5/378 H01L27/14643 H04N5/3535

    Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.

    Abstract translation: 互补金属氧化物半导体(CMOS)图像传感器包括光电二极管,开关和比较器。 开关将感测信号从光电二极管传送到感测节点。 直接连接到感测节点的比较器将感测节点的感测信号与参考信号进行比较。 比较器输出对应于感测信号和参考信号之间的电压差的信号。

    Two-path sigma-delta analog-to-digital converter and image sensor including the same
    34.
    发明申请
    Two-path sigma-delta analog-to-digital converter and image sensor including the same 有权
    包括两路Σ-Δ模数转换器和图像传感器

    公开(公告)号:US20100208114A1

    公开(公告)日:2010-08-19

    申请号:US12656577

    申请日:2010-02-04

    CPC classification number: H04N5/335 H03M3/474 H04N5/378

    Abstract: A two-path sigma-delta analog-to-digital converter and an image sensor including the same are provided. The two-path sigma-delta analog-to-digital converter includes at least one integrator configured to integrate a first integrator input signal during a second half cycle of a clock signal and integrate a second integrator input signal during a first half cycle of the clock signal by using a single operational amplifier; a quantizer configured to quantize integrated signals from the at least one integrator and output a first digital signal and a second digital signal; and a feedback loop configured to feed back the first and second digital signals to an input of the at least one integrator. A first analog signal and a second analog signal respectively input from two input paths are respectively converted to the first and second digital signals using the single operational amplifier, thereby increasing power efficiency and reducing an area.

    Abstract translation: 提供了一个双通道Σ-Δ模数转换器和包括它的图像传感器。 双通道Σ-Δ模数转换器包括至少一个积分器,其被配置为在时钟信号的第二半周期期间积分第一积分器输入信号,并且在时钟的前半周期期间积分第二积分器输入信号 信号通过使用单个运算放大器; 量化器,被配置为量化来自所述至少一个积分器的积分信号并输出​​第一数字信号和第二数字信号; 以及反馈回路,其被配置为将所述第一和第二数字信号反馈到所述至少一个积分器的输入。 分别从两个输入路径输入的第一模拟信号和第二模拟信号分别使用单个运算放大器转换为第一和第二数字信号,从而提高功率效率并缩小面积。

    Sigma-delta analog-to-digital converter and solid-state image pickup device
    35.
    发明授权
    Sigma-delta analog-to-digital converter and solid-state image pickup device 有权
    Sigma-delta模数转换器和固态图像拾取器件

    公开(公告)号:US07773018B2

    公开(公告)日:2010-08-10

    申请号:US12453845

    申请日:2009-05-26

    CPC classification number: H03M3/384 H03M3/424

    Abstract: A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.

    Abstract translation: Σ-Δ模数转换器可以包括Σ-Δ调制器和抽取滤波器。 Σ-Δ调制器可以使用Σ-Δ调制将第一模拟输入信号转换成具有第一模式的第一比特流,并且使用Σ-Δ调制将第二模拟输入信号转换成具有第二模式的第二比特流。 抽取滤波器可以将具有特定值的比特数量集成在第一比特流中,输出第一数字值,计算第一数字值的按位补码,将具有特定值的比特数集成在第二比特流中 以第一数字值的按位补码作为第二数字值的初始值,并输出第二数字值。

    Pixel sensor array and image sensor including the same
    37.
    发明申请
    Pixel sensor array and image sensor including the same 有权
    像素传感器阵列和图像传感器包括相同

    公开(公告)号:US20100110256A1

    公开(公告)日:2010-05-06

    申请号:US12591039

    申请日:2009-11-05

    CPC classification number: H04N5/3745 H04N5/3741 H04N5/378

    Abstract: Provided are a pixel sensor array and a complementary metal-oxide semiconductor (CMOS) image sensor including the same. The pixel sensor array includes a photoelectric transformation element configured to generate electric charges in response to incident light. A signal transmitting circuit is configured to output the electric charges accumulated in the photoelectric transformation element to a first node based on a first control signal, change an electric potential of the first node to an electric potential of a second signal line based on a second control signal, and output a signal sensed in the first node to a first signal line based on a third control signal. A switch element is configured to connect a supply power terminal to the second signal line based on a fourth control signal. A comparator connected to the first signal line and the second signal line and configured to compare a voltage of the signal and a voltage of a reference signal.

    Abstract translation: 提供了一种像素传感器阵列和包括该像素传感器阵列的互补金属氧化物半导体(CMOS)图像传感器。 像素传感器阵列包括被配置为响应于入射光而产生电荷的光电转换元件。 信号发送电路被配置为基于第一控制信号将累积在光电变换元件中的电荷输出到第一节点,基于第二控制将第一节点的电位改变为第二信号线的电位 信号,并且基于第三控制信号将在第一节点中感测的信号输出到第一信号线。 开关元件被配置为基于第四控制信号将电源端子连接到第二信号线。 比较器,连接到第一信号线和第二信号线,并被配置为比较信号的电压和参考信号的电压。

    APPARATUS AND METHOD FOR SIGMA-DELTA ANALOG TO DIGITAL CONVERSION
    38.
    发明申请
    APPARATUS AND METHOD FOR SIGMA-DELTA ANALOG TO DIGITAL CONVERSION 有权
    SIGMA-DELTA模拟数字转换的装置和方法

    公开(公告)号:US20090261998A1

    公开(公告)日:2009-10-22

    申请号:US12427303

    申请日:2009-04-21

    CPC classification number: H03M3/46 H03M1/56 H03M3/43 H03M3/456

    Abstract: A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least One low-order bit.

    Abstract translation: 提供了一种用于Σ-Δ(SigmaDelta)模数转换的方法和装置,该方法包括接收模拟信号,对接收信号进行采样,将采样信号与恒定参考电压进行比较,提供至少一个高阶位响应 对所述恒定参考比较进行比较,将所述采样信号与可变参考电压进行比较,提供响应于所述可变参考比较的至少一个低阶位,以及将所述至少一个高位位与所述至少一个低位位 ; 并且所述装置包括比较器,向所述比较器提供用于提供至少一个高位的恒定参考电压的第一ADC部分和向比较器提供可变参考电压的第二ADC部分,用于提供至少一个低阶 位。

    Switched capacitor circuit with inverting amplifier and offset unit
    39.
    发明申请
    Switched capacitor circuit with inverting amplifier and offset unit 有权
    具有反相放大器和偏移单元的开关电容器电路

    公开(公告)号:US20080116966A1

    公开(公告)日:2008-05-22

    申请号:US11986345

    申请日:2007-11-21

    CPC classification number: H03H19/004 H03M3/356 H03M3/43 H03M3/456

    Abstract: A switched capacitor circuit includes an amplifier, a charging unit, an offset unit, and an integrating unit. The charging unit is coupled between an input node and a first node, and is for accumulating charge corresponding to an input signal during a sampling mode. The offset unit is coupled between the first node and an input of the amplifier, and is for maintaining the first node to be a virtual ground during an integrating mode. The integrating unit is coupled between the first node and an output of the amplifier, and is for receiving charge from the charging unit during the integrating mode.

    Abstract translation: 开关电容电路包括放大器,充电单元,偏移单元和积分单元。 充电单元耦合在输入节点和第一节点之间,并且用于在采样模式期间累加对应于输入信号的电荷。 偏移单元耦合在第一节点和放大器的输入之间,并且用于在积分模式期间将第一节点维持为虚拟地面。 积分单元耦合在第一节点和放大器的输出端之间,用于在积分模式期间从充电单元接收电荷。

    Lossless nonlinear analog gain controller in image sensor and manufacturing method thereof
    40.
    发明申请
    Lossless nonlinear analog gain controller in image sensor and manufacturing method thereof 有权
    图像传感器中的无损非线性模拟增益控制器及其制造方法

    公开(公告)号:US20070046513A1

    公开(公告)日:2007-03-01

    申请号:US11508616

    申请日:2006-08-23

    CPC classification number: H03M1/58 H03M1/123 H03M1/56

    Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC), and a ramp signal generator. The APS array has includes a plurality of pixels of arranged in a second order two-dimensional matrix, and wherein the APS array generates a reset signal and an image signal for each pixel of selected columns. The first ADC has includes correlated double sampling (CDS) circuits for each column of the APS array, and wherein the first ADC generates a digital code corresponding to the difference between the reset signal and the image signal using an output ramp signal that is applied to the CDS circuits for each column. The ramp generator generates the output ramp signal in which a low illumination portion and a high illumination portion have different slopes.

    Abstract translation: 图像传感器包括有源像素传感器(APS)阵列,第一模数转换器(ADC)和斜坡信号发生器。 APS阵列包括以二阶二维矩阵排列的多个像素,并且其中APS阵列为选定列的每个像素产生复位信号和图像信号。 第一ADC包括用于APS阵列的每列的相关双采样(CDS)电路,并且其中第一ADC使用输出斜坡信号产生与复位信号和图像信号之间的差相对应的数字码, 每列的CDS电路。 斜坡发生器产生输出斜坡信号,其中低照明部分和高照明部分具有不同的斜率。

Patent Agency Ranking