公开(公告)号：US20080242030A1

公开(公告)日：2008-10-02

申请号：US11965835

申请日：2007-12-28

Applicant: Dong Sun SHEEN ,  Seok Pyo SONG ,  Young Ho LEE

Inventor： Dong Sun SHEEN ,  Seok Pyo SONG ,  Young Ho LEE

IPC: H01L21/336

CPC classification number: H01L29/66795 ,  H01L29/7851

Abstract: A method for manufacturing a fin transistor includes forming a trench by etching a semiconductor substrate. A flowable insulation layer is filled in the trench to form a field insulation layer defining an active region. The portion of the flowable insulation layer coming into contact with a gate forming region is etched so as to protrude the gate forming region in the active region. A protective layer over the semiconductor substrate is formed to fill the portion of the etched flowable insulation layer. The portion of the protective layer formed over the active region is removed to expose the active region of the semiconductor substrate. The exposed active region of the semiconductor substrate is cleaned. The protective layer remaining on the portion of the etched flowable insulation layer is removed. Gates are formed over the protruded gate forming regions in the active region.

Abstract translation: 一种制造鳍式晶体管的方法包括：通过蚀刻半导体衬底形成沟槽。 可流动的绝缘层填充在沟槽中以形成限定有源区的场绝缘层。 与栅极形成区域接触的可流动绝缘层的部分被蚀刻以便在有源区域中突出栅极形成区域。 形成半导体衬底上方的保护层以填充该可蚀刻的可流动绝缘层的部分。 在有源区上形成的保护层的部分被去除以暴露半导体衬底的有源区。 清洁半导体衬底的暴露的有源区。 残留在可蚀刻的可流动绝缘层的部分上的保护层被去除。 在活性区域中的突出的栅极形成区域上形成栅极。

公开(公告)号：US07412115B2

公开(公告)日：2008-08-12

申请号：US10962900

申请日：2004-10-13

Applicant: Hwa-sup Lim ,  Young-ho Lee

Inventor： Hwa-sup Lim ,  Young-ho Lee

IPC: G06K9/32 ,  G06K9/36 ,  G06F17/00

CPC classification number: G06T3/403 ,  G06T3/4007

Abstract: An image processing device and a method thereof. The image processing device includes a mapper to map a two-dimensional plane of an input image into a three-dimensional vector surface, a coefficient calculator to calculate a coefficient with respect to an equation of a plane formed by a plurality of pixels mapped by the mapper, and an interpolator to interpolate by calculating a gray-level of a location to be interpolated based on the equation of the plane obtained by the coefficient calculator. When the pixels on the 2-D plane are mapped into the 3-D vector space, the image processing device according to an exemplary embodiment of the present general inventive concept prevents overshoot or undershoot which may occur at the edges or on planes, and thus displays a smooth image.

Abstract translation: 一种图像处理装置及其方法。 图像处理装置包括将输入图像的二维平面映射成三维矢量面的映射器，计算与由多个像素映射的多个像素形成的平面的方程式的系数的系数计算部 映射器和内插器，用于通过基于由系数计算器获得的平面的方程式计算要插值的位置的灰度级来插值。 当2-D平面上的像素被映射到3-D向量空间中时，根据本发明总体构思的示例性实施例的图像处理装置防止可能发生在边缘或平面上的过冲或下冲，因此 显示平滑的图像。

公开(公告)号：US20080185663A1

公开(公告)日：2008-08-07

申请号：US11941194

申请日：2007-11-16

Applicant: Seok Pyo SONG ,  Dong Sun SHEEN ,  Young Ho LEE

Inventor： Seok Pyo SONG ,  Dong Sun SHEEN ,  Young Ho LEE

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66621 ,  H01L29/4236

Abstract: A semiconductor device includes a semiconductor substrate having an active region including a channel portion. An isolation layer is formed in the semiconductor substrate to define the active region, and a gate is formed over the channel portion in the active region. The active region of the semiconductor substrate is etched to such that the entire active region is below an upper surface of the isolation layer. A U-shaped groove is formed in the channel portion of the active region, except the edges in a direction of the channel width thereof, in order to increase the channel width. In the semiconductor device, there is an increase in channel length and channel width leading to a reduction in leakage current and on increase in operation current.

Abstract translation: 半导体器件包括具有包括沟道部分的有源区的半导体衬底。 在半导体衬底中形成隔离层以限定有源区，并且在有源区中的沟道部分之上形成栅极。 蚀刻半导体衬底的有源区，使得整个有源区在隔离层的上表面下方。 为了增加通道宽度，在活性区域的通道部分中形成U形槽，除了其通道宽度方向上的边缘之外。 在半导体器件中，通道长度和通道宽度增加，导致漏电流的减小和工作电流的增加。

公开(公告)号：US20070047647A1

公开(公告)日：2007-03-01

申请号：US11507468

申请日：2006-08-22

Applicant: Ki-deok Lee ,  Seung-joon Yang ,  Young-ho Lee ,  Hak-hun Choi ,  Hyung-jin Choi

Inventor： Ki-deok Lee ,  Seung-joon Yang ,  Young-ho Lee ,  Hak-hun Choi ,  Hyung-jin Choi

IPC: H04N7/12 ,  H04B1/66

CPC classification number: H04N5/208 ,  G06T5/002 ,  G06T5/003 ,  G06T5/20 ,  G06T7/20 ,  G06T2207/20012 ,  H04N5/145

Abstract: An image enhancement apparatus using motion estimation includes: a motion estimation unit estimating a degree of motion between an input image on which image enhancement is performed and a temporally successive image; and an enhancement unit applying the image enhancement to an area without motion in the input image while not applying the image enhancement to an area with motion in the input image on the basis of the motion degree. Accordingly, by performing image enhancement on an area without motion in an input image while not performing image enhancement on an area with motion in the input image, it is possible to prevent image noise from being generated in the area with motion.

Abstract translation: 使用运动估计的图像增强装置包括：运动估计单元，估计在其上执行图像增强的输入图像与时间上连续的图像之间的运动程度; 以及增强单元，其基于所述运动程度，在不输入所述输入图像中的运动区域的情况下，将所述图像增强应用于所述输入图像中的运动区域。 因此，通过在输入图像中对运动区域进行图像增强的同时对输入图像中的运动区域进行图像增强，可以防止在运动区域产生图像噪声。

公开(公告)号：US20060240655A1

公开(公告)日：2006-10-26

申请号：US11154474

申请日：2005-06-17

Applicant: Young-Ho Lee

Inventor： Young-Ho Lee

IPC: H01L21/3205 ,  H01L21/44 ,  H01L21/4763

CPC classification number: H01L21/76897 ,  H01L21/02063 ,  H01L21/28525 ,  H01L21/76877

Abstract: Disclosed are a contact plug of a semiconductor device and a method for fabricating the same. The semiconductor device includes: an epitaxial stack formed by inserting a heteroepitaxy layer between a pair of homoepitaxy layers; and a contact plug including a metal layer on the epitaxial stack. Accordingly, in accordance with the present invention, the contact plug is selectively doped in a high concentration, thereby reducing a contact resistance. Furthermore, the present invention also provides an effect of reducing degradation in a device property without decreasing yields of products by minimizing a thermal budget through using a SEG-silicon germanium layer capable of obtaining a high doping concentration and a high deposition speed.

公开(公告)号：US20060139485A1

公开(公告)日：2006-06-29

申请号：US11294505

申请日：2005-12-06

Applicant: Haeng-kang Kim ,  Young-ho Lee

Inventor： Haeng-kang Kim ,  Young-ho Lee

IPC: H04N11/20 ,  H04N7/01

CPC classification number: H04N7/012 ,  H04N7/0115 ,  Y10S348/91

Abstract: A judder detection apparatus, a de-interlacing apparatus using the judder detection apparatus, and a de-interlacing method. The judder detection apparatus includes a judder detector to detect whether a detected pattern that is similar to a judder pattern occurs using predetermined pixel values of even and odd fields sequentially input, a pattern detector to detect whether an input image has a uniform pixel value in every other line of the even and odd fields and whether consecutive lines of the even and odd fields have a blind pattern having a difference from the uniform pixel that is greater than or equal to a threshold value, and a determiner to determine whether the detected pattern that is similar to the judder pattern is a judder based on whether the blind pattern is detected.

Abstract translation: 抖动检测装置，使用抖动检测装置的去隔行装置以及去隔行扫描方法。 抖动检测装置包括抖动检测器，用于检测是否使用顺序输入的偶数和奇数场的预定像素值来发生类似于抖动图案的检测图案;模式检测器，用于检测输入图像是否具有均匀的像素值 奇数场和奇数场的另一行以及偶数和奇数场的连续行是否具有与大于或等于阈值的均匀像素不同的盲模式;以及确定器，用于确定检测到的图案是否 类似于抖动模式是基于是否检测到盲模式的抖动。

公开(公告)号：US20050105826A1

公开(公告)日：2005-05-19

申请号：US10927230

申请日：2004-08-27

Applicant: Seong-joon Yang ,  Hwa-sup Lim ,  Young-ho Lee

Inventor： Seong-joon Yang ,  Hwa-sup Lim ,  Young-ho Lee

IPC: G06T15/00 ,  G06T3/40 ,  G06T5/00 ,  G06T5/20 ,  H01J40/14

CPC classification number: G06T5/20 ,  G06T3/4007 ,  G06T3/403 ,  G06T7/13

Abstract: An edge detection apparatus and method includes a mapping part to map a two-dimensional plane of an input image into a three-dimensional vector surface, a coefficient calculation part to calculate coefficients for an equation of planes each formed with plural pixels and mapped by the mapping part, an angle calculation part to calculate an angle formed by a normal vector with respect to the equation of planes, and an edge decision part to determine whether an edge exists based on the angle calculated by the angle calculation part. Accordingly, the edge detection apparatus can not only efficiently detect edges without sensitivity to noise over high frequency bands, but also adaptively perform edge detections depending on the extent of noise so as to provide diverse adjustment points for the edge detections.

Abstract translation: 边缘检测装置和方法包括映射部分，将输入图像的二维平面映射成三维向量表面;系数计算部分，用于计算由多个像素形成的平面的方程式的系数，并由 映射部分，角度计算部分，用于计算由相对于平面方程的法向量形成的角度;以及边缘判定部分，用于基于由角度计算部分计算出的角度来确定边缘是否存在。 因此，边缘检测装置不仅可以有效地检测高频带上的噪声，而且还可以根据噪声的程度自适应地执行边缘检测，从而为边缘检测提供不同的调整点。

公开(公告)号：US6111637A

公开(公告)日：2000-08-29

申请号：US768710

申请日：1996-12-18

Applicant: Young-Ho Lee ,  Sang-Kyu Hahm ,  Young-Kyu Lim ,  Byoung-Seol Ahn

Inventor： Young-Ho Lee ,  Sang-Kyu Hahm ,  Young-Kyu Lim ,  Byoung-Seol Ahn

IPC: G01N21/88 ,  G01N21/94 ,  G01N21/95 ,  G01N21/956 ,  G01R31/01 ,  G01R31/28 ,  H01L21/00 ,  H01L21/66 ,  H01L21/677 ,  H01L21/687 ,  G01N21/00 ,  B65G49/07 ,  H04N7/18

CPC classification number: H01L21/67253 ,  G01N21/9501 ,  G01R31/2831 ,  H01L21/68707 ,  G01R31/01 ,  Y10S414/135 ,  Y10S414/136 ,  Y10S414/137 ,  Y10S414/14

Abstract: A method and an apparatus for examining wafers includes a wafer cassette having a capacity for holding a plurality of wafers located on each of first and second locaters. The wafer cassettes are fixedly held on the first and second locaters during the wafer examination. A first indicator shows that the wafer cassettes are fixedly held on the first and second locaters. A robot arm sequentially carries each of the wafers between the first locator, an aligner, a scanning chamber and the second locater to examine the wafers. The wafer cassettes are released when the examination is complete, and a second indicator shows that the examination is complete.

Abstract translation: 用于检查晶片的方法和装置包括具有用于保持位于第一和第二定位器中的每一个上的多个晶片的能力的晶片盒。 在晶片检查期间，晶片盒被固定地保持在第一和第二定位器上。 第一指示器显示晶片盒被固定地保持在第一和第二定位器上。 机器人臂顺序地携带在第一定位器，对准器，扫描室和第二定位器之间的每个晶片以检查晶片。 当检查完成时，晶片盒被释放，第二个指示器显示检查完成。

公开(公告)号：US09621368B2

公开(公告)日：2017-04-11

申请号：US13396278

申请日：2012-02-14

Applicant: Young-kyu Jin ,  Young-ho Lee ,  Il-ku Chang ,  Young-shil Jang

Inventor： Young-kyu Jin ,  Young-ho Lee ,  Il-ku Chang ,  Young-shil Jang

IPC: G09G5/00 ,  G09G5/02 ,  G06K9/00 ,  G06K9/46 ,  G06F3/048 ,  G01R21/00 ,  H04L12/28 ,  G01R21/133 ,  G06F3/0482 ,  G06K9/48 ,  G06F3/0481 ,  G06T11/00 ,  G09G5/14 ,  G06T11/60

CPC classification number: G06K9/00671 ,  G01R21/133 ,  G06F3/0481 ,  G06F3/04817 ,  G06F3/0482 ,  G06F3/04847 ,  G06K9/00 ,  G06K9/48 ,  G06Q30/0283 ,  G06Q50/06 ,  G06T11/001 ,  G06T11/60 ,  G06T2200/24 ,  G09G5/02 ,  G09G5/14 ,  H04L12/2807 ,  H04W4/80

Abstract: Provided is a method for displaying electricity use status and a portable device thereof by identifying at least one electronic appliance in an image on a screen captured through a camera, receiving electricity use information of the at least one electronic appliance, determining the electricity use status of the at least one electronic appliance using the received electricity use information, and displaying one of a plurality of Graphical User Interfaces (GUI), wherein each GUI corresponds to a different stage of the electricity use status of the at least one electronic appliance.

公开(公告)号：US09377515B2

公开(公告)日：2016-06-28

申请号：US13457130

申请日：2012-04-26

Applicant: Jin Mok Kim ,  Young Ho Lee ,  Hyukchan Kwon ,  Ki Woong Kim ,  Kwon Kyu Yu

Inventor： Jin Mok Kim ,  Young Ho Lee ,  Hyukchan Kwon ,  Ki Woong Kim ,  Kwon Kyu Yu

IPC: G01R33/02 ,  G01R33/035

CPC classification number: G01R33/0354 ,  G01R33/035

Abstract: Provided are a flux-locked loop circuit, a flux-locked loop method and a superconducting quantum interference device (SQUID) measuring apparatus. The flux-locked loop circuit includes a pre-amplifier configured to amplify a signal output of a SQUID, an integrator configured to integrate a signal output from the pre-amplifier and output the integrated signal, an operating range expanding unit configured to initialize the integrator by comparing an output signal of the integrator with a positive or negative reference reset voltage corresponding to an external flux of a predetermined integral multiple of flux quantum, and a feedback circuit configured to supply current to eliminate a difference between the external flux applied to the SQUID and a magnetic flux corresponding to an integral multiple of the reference reset voltage according to the output signal of the integrator.

Abstract translation: 提供了一种磁通锁定环路电路，一个磁通锁定环路方法和一种超导量子干涉装置（SQUID）测量装置。 磁通锁定环电路包括：前置放大器，被配置为放大SQUID的信号输出;积分器，被配置为积分从前置放大器输出的信号并输出​​积分信号;工作范围扩展单元，被配置为初始化积分器 通过将积分器的输出信号与对应于预定的通量量子的整数倍的外部通量的正或负参考复位电压进行比较，以及反馈电路，被配置为提供电流以消除施加到SQUID的外部通量之间的差 以及根据积分器的输出信号对应于基准复位电压的整数倍的磁通量。