公开(公告)号：US20080265321A1

公开(公告)日：2008-10-30

申请号：US11741602

申请日：2007-04-27

申请人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh

发明人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh

IPC分类号： H01L29/78

CPC分类号： H01L21/26586 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fin field-effect transistor (finFET) with improved source/drain regions is provided. In an embodiment, the source/drain regions of the fin are removed while spacers adjacent to the fin remain. An angled implant is used to implant the source/drain regions near a gate electrode, thereby allowing for a more uniform lightly doped drain. The fin may be re-formed by either epitaxial growth or a metallization process. In another embodiment, the spacers adjacent the fin in the source/drain regions are removed and the fin is silicided along the sides and the top of the fin. In yet another embodiment, the fin and the spacers are removed in the source/drain regions. The fins are then re-formed via an epitaxial growth process or a metallization process. Combinations of these embodiments may also be used.

摘要翻译： 提供了具有改善的源极/漏极区域的鳍状场效应晶体管（finFET）。 在一个实施例中，去除鳍片的源极/漏极区域，同时留下与鳍片相邻的间隔物。 倾斜的注入用于在栅电极附近注入源极/漏极区，从而允许更均匀的轻掺杂漏极。 鳍可以通过外延生长或金属化过程重新形成。 在另一个实施例中，去除与源极/漏极区域中的鳍片相邻的间隔物，并且翅片沿翅片的侧面和顶部被硅化。 在另一个实施例中，在源极/漏极区域中去除鳍片和间隔物。 然后通过外延生长工艺或金属化工艺重新形成翅片。 也可以使用这些实施例的组合。

公开(公告)号：US09935197B2

公开(公告)日：2018-04-03

申请号：US13616194

申请日：2012-09-14

申请人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Hua Yu

发明人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Hua Yu

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06 ,  H01L29/788 ,  H01L29/792 ,  H01L21/762 ,  H01L29/66

CPC分类号： H01L29/7833 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0653 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7881 ,  H01L29/792

摘要： Semiconductor devices with low junction capacitances and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming isolation regions in a substrate to form active areas. The sidewalls of the active areas are enclosed by the isolation regions. The isolation regions are recessed to expose first parts of the sidewalls of the active areas. The first parts of the sidewalls of the active areas are covered with spacers. The isolation regions are etched to expose second parts of the sidewalls of the active area, the second parts being disposed below the first parts. The active areas are etched through the exposed second parts of the sidewalls to form lateral openings. The lateral openings are filled with a spin on dielectric.

公开(公告)号：US08617948B2

公开(公告)日：2013-12-31

申请号：US13103594

申请日：2011-05-09

申请人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh ,  Cheng-Hung Chang

发明人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh ,  Cheng-Hung Chang

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L29/1033 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/785

摘要： A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.

公开(公告)号：US20130143406A1

公开(公告)日：2013-06-06

申请号：US13311948

申请日：2011-12-06

申请人： Yu-Rung Hsu ,  Sung-Hsun Wu ,  Kuo Bin Huang

发明人： Yu-Rung Hsu ,  Sung-Hsun Wu ,  Kuo Bin Huang

IPC分类号： H01L21/311

CPC分类号： G03F7/42 ,  G03F7/423 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/67115

摘要： A method for manufacturing a semiconductor device includes forming a patterned photoresist layer over a substrate, performing a plasma ashing process to the patterned photoresist layer, thereby removing a portion of the patterned photoresist layer, exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone, thereby removing other portions of the patterned photoresist layer, and performing a cleaning of the patterned photoresist layer after exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone.

摘要翻译： 一种用于制造半导体器件的方法包括在衬底上形成图案化的光致抗蚀剂层，对图案化的光致抗蚀剂层执行等离子体灰化处理，从而去除图案化光致抗蚀剂层的一部分，将图案化的光致抗蚀剂层暴露于宽带紫外线辐射和臭氧， 从而去除图案化光致抗蚀剂层的其它部分，并且在将图案化的光致抗蚀剂层暴露于宽带紫外线辐射和臭氧之后，对图案化的光致抗蚀剂层进行清洁。

公开(公告)号：US08143114B2

公开(公告)日：2012-03-27

申请号：US13027436

申请日：2011-02-15

申请人： Chen-Hua Yu ,  Cheng-Hung Chang ,  Chen-Nan Yeh ,  Yu-Rung Hsu

发明人： Chen-Hua Yu ,  Cheng-Hung Chang ,  Chen-Nan Yeh ,  Yu-Rung Hsu

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/785 ,  H01L21/76897 ,  H01L23/485 ,  H01L29/20 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7843 ,  H01L2029/7858

摘要： System and method for reducing contact resistance and prevent variations due to misalignment of contacts is disclosed. A preferred embodiment comprises a non-planar transistor with source/drain regions located within a fin. An inter-layer dielectric overlies the non-planar transistor, and contacts are formed to the source/drain region through the inter-layer dielectric. The contacts preferably come into contact with multiple surfaces of the fin so as to increase the contact area between the contacts and the fin.

摘要翻译： 公开了用于降低接触电阻并防止由于接触不对准引起的变化的系统和方法。 优选实施例包括具有位于鳍内的源/漏区的非平面晶体管。 层间电介质覆盖非平面晶体管，并且通过层间电介质将触点形成到源/漏区。 接触件优选地与翅片的多个表面接触，以增加接触件和翅片之间的接触面积。

公开(公告)号：US20110223735A1

公开(公告)日：2011-09-15

申请号：US13103594

申请日：2011-05-09

申请人： CHEN-HUA YU ,  YU-RUNG HSU ,  CHEN-NAN YEH ,  CHENG-HUNG CHANG

发明人： CHEN-HUA YU ,  YU-RUNG HSU ,  CHEN-NAN YEH ,  CHENG-HUNG CHANG

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L29/1033 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/785

摘要： A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.

摘要翻译： 半导体结构包括在基板的顶面上的半导体翅片，其中半导体鳍片包括具有第一宽度的中间部分; 以及连接到中间部分的相对端部的第一和第二端部分，其中第一和第二端部部分至少包括具有大于第一宽度的第二宽度的顶部部分。 半导体结构还包括在半导体鳍片的顶表面和中间部分的侧壁上的栅介质层; 以及栅极电介质层上的栅电极。

公开(公告)号：US20100213548A1

公开(公告)日：2010-08-26

申请号：US12618505

申请日：2009-11-13

申请人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Hua Yu

发明人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Hua Yu

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L21/762

CPC分类号： H01L29/7833 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0653 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7881 ,  H01L29/792

摘要： Semiconductor devices with low junction capacitances and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming isolation regions in a substrate to form active areas. The sidewalls of the active areas are enclosed by the isolation regions. The isolation regions are recessed to expose first parts of the sidewalls of the active areas. The first parts of the sidewalls of the active areas are covered with spacers. The isolation regions are etched to expose second parts of the sidewalls of the active area, the second parts being disposed below the first parts. The active areas are etched through the exposed second parts of the sidewalls to form lateral openings. The lateral openings are filled with a spin on dielectric.

摘要翻译： 描述具有低结电容的半导体器件及其制造方法。 在一个实施例中，形成半导体器件的方法包括在衬底中形成隔离区以形成有源区。 有源区的侧壁由隔离区包围。 隔离区域被凹入以暴露有源区域的侧壁的第一部分。 有源区域的侧壁的第一部分被间隔物覆盖。 隔离区域被蚀刻以暴露有源区域的侧壁的第二部分，第二部分设置在第一部分的下方。 通过侧壁的暴露的第二部分蚀刻有源区域以形成侧向开口。 横向开口用电介质上的旋转填充。

公开(公告)号：US20100144121A1

公开(公告)日：2010-06-10

申请号：US12329279

申请日：2008-12-05

申请人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Yi Lee ,  Shih-Ting Hung ,  Chen-Nan Yeh ,  Chen-Hua Yu

发明人： Cheng-Hung Chang ,  Yu-Rung Hsu ,  Chen-Yi Lee ,  Shih-Ting Hung ,  Chen-Nan Yeh ,  Chen-Hua Yu

IPC分类号： H01L21/20 ,  H01L21/28

CPC分类号： H01L29/66795 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02617 ,  H01L29/1054 ,  H01L29/7851

摘要： A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fine. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

摘要翻译： 形成半导体结构的方法包括提供复合衬底，该复合衬底包括在本体硅衬底上并邻接体硅衬底的体硅衬底和硅锗（SiGe）层。 对SiGe层进行第一次冷凝以形成冷凝的SiGe层，使得冷凝的SiGe层具有基本均匀的锗浓度。 蚀刻冷凝的SiGe层和体硅衬底的顶部以形成包括硅片和在硅微细上的冷凝的SiGe鳍的复合翅片。 该方法还包括氧化硅片的一部分; 并对冷凝的SiGe翅片进行第二冷凝。

公开(公告)号：US07667271B2

公开(公告)日：2010-02-23

申请号：US11741602

申请日：2007-04-27

申请人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh

发明人： Chen-Hua Yu ,  Yu-Rung Hsu ,  Chen-Nan Yeh

IPC分类号： H01L23/62

CPC分类号： H01L21/26586 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fin field-effect transistor (finFET) with improved source/drain regions is provided. In an embodiment, the source/drain regions of the fin are removed while spacers adjacent to the fin remain. An angled implant is used to implant the source/drain regions near a gate electrode, thereby allowing for a more uniform lightly doped drain. The fin may be re-formed by either epitaxial growth or a metallization process. In another embodiment, the spacers adjacent the fin in the source/drain regions are removed and the fin is silicided along the sides and the top of the fin. In yet another embodiment, the fin and the spacers are removed in the source/drain regions. The fins are then re-formed via an epitaxial growth process or a metallization process. Combinations of these embodiments may also be used.

摘要翻译： 提供了具有改善的源极/漏极区域的鳍状场效应晶体管（finFET）。 在一个实施例中，去除鳍片的源极/漏极区域，同时留下与鳍片相邻的间隔物。 倾斜的注入用于在栅电极附近注入源极/漏极区，从而允许更均匀的轻掺杂漏极。 鳍可以通过外延生长或金属化过程重新形成。 在另一个实施例中，去除与源极/漏极区域中的鳍片相邻的间隔物，并且翅片沿翅片的侧面和顶部被硅化。 在另一个实施例中，在源极/漏极区域中去除鳍片和间隔物。 然后通过外延生长工艺或金属化工艺重新形成翅片。 也可以使用这些实施例的组合。