公开(公告)号：US10255210B1

公开(公告)日：2019-04-09

申请号：US15058053

申请日：2016-03-01

Applicant: Amazon Technologies, Inc.

Inventor： Nafea Bshara ,  Guy Nakibly ,  Adi Habusha

IPC: G06F13/36 ,  G06F13/42 ,  G06F13/362 ,  G06F13/40

Abstract: A master device transmits a transaction to a target device. The transaction includes a transaction identifier. An ordering message is sent to the target device over a bus that is different than a communication channel that the transaction is transmitted over. The ordering message includes the transaction identifier. The target device adjusts an order of execution of the transaction by the target device based at least in part on receiving the ordering message.

公开(公告)号：US10198026B1

公开(公告)日：2019-02-05

申请号：US15475030

申请日：2017-03-30

Applicant: Amazon Technologies, Inc.

Inventor： Guy Nakibly ,  Usama Nassir ,  Saar Gross ,  Nafea Bshara ,  Barak Wasserstrom ,  Daniel Joseph Grey

IPC: G06F1/08 ,  G06F1/12

Abstract: In a system having a first clock domain with a first clock and a second clock domain with a second clock, the first and second clocks are monitored to determine whether one or both clocks are active. The first clock is selected to be an output clock if the first clock is active and the second clock is disabled irrespective of the clock selection signal. The second clock is selected to be the output clock if the second clock is active and the first clock is disabled irrespective of the clock selection signal. If both the first clock and the second clock are active, either the first clock or the second clock is selected according to a received clock selection signal.

公开(公告)号：US10102072B2

公开(公告)日：2018-10-16

申请号：US15282254

申请日：2016-09-30

Applicant: Amazon Technologies, Inc.

Inventor： Ron Diamant ,  Nafea Bshara ,  Yaniv Shapira ,  Guy Nakibly

IPC: G06F11/00 ,  G06F11/10 ,  G06F11/20

Abstract: A method for calculating a plurality (M) of redundancy blocks for multiple (N) data blocks of a plurality (D) of words each, the method comprises: receiving the number (M) of redundancy blocks by a calculator that comprises multiple (R) calculation units; configuring the calculator according to M and R; concurrently calculating, if M equals R, by the multiple (R) calculation units of the calculator, R sets of parity vectors, each set includes a plurality (D) of parity vectors; and calculating the plurality (M) of the redundancy blocks based on the R sets of parity vectors.

公开(公告)号：US12050486B1

公开(公告)日：2024-07-30

申请号：US17805672

申请日：2022-06-06

Applicant: Amazon Technologies, Inc.

Inventor： Guy Nakibly ,  Moshe Raz ,  Zvika Glaubach ,  Moshe Noah

IPC: G06F1/12 ,  G06F13/42 ,  H04L5/00 ,  H04L7/00

CPC classification number: G06F1/12

Abstract: Techniques for cooperative timing alignment using synchronization pulses are described. The techniques can include generating, at an integrated circuit device, a timing signal, controlling a local count value based on the timing signal, monitoring a synchronization signal of a system comprising the integrated circuit device, detecting a synchronization pulse in the synchronization signal, and aligning the local count value with an implied count value associated with the synchronization pulse in order to align the local count value with those of other integrated circuit devices of the system.

公开(公告)号：US12001352B1

公开(公告)日：2024-06-04

申请号：US17937395

申请日：2022-09-30

Applicant: Amazon Technologies, Inc.

Inventor： Rashika Kheria ,  Ron Diamant ,  Se Wang Oh ,  Guy Nakibly

IPC: G06F13/16 ,  G06F9/46

CPC classification number: G06F13/1621 ,  G06F9/466

Abstract: Techniques are provided to maintain data coherency for data transfers among data processing devices in a distributed computing environment. A data buffer in each data processing device can be mapped to an address range that is assigned to transactions that allow out-of-order completions, and a message buffer in each data processing device can be mapped to an address range that is assigned to transactions that follow transaction ordering. Thus, a transaction to store a set of data into the data buffer is completed before a transaction to write a synchronization message in the message buffer indicating that the set of data is stored in the data buffer based on the mapping irrespective of the transaction ordering indicated by each transaction.

公开(公告)号：US20240126714A1

公开(公告)日：2024-04-18

申请号：US18397199

申请日：2023-12-27

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Leah Shalev ,  Nafea Bshara ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F15/167 ,  G06F16/22 ,  H04L69/22

CPC classification number: G06F15/167 ,  G06F16/22 ,  H04L69/22

Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

公开(公告)号：US11886355B2

公开(公告)日：2024-01-30

申请号：US17660797

申请日：2022-04-26

Applicant: Amazon Technologies, Inc.

Inventor： Nafea Bshara ,  Adi Habusha ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F3/00 ,  G06F13/10 ,  G06F13/24 ,  G06F13/42 ,  G06F9/50

CPC classification number: G06F13/105 ,  G06F9/5077 ,  G06F13/24 ,  G06F13/4282 ,  G06F2213/0026 ,  G06F2213/0058

Abstract: Techniques for emulating a configuration space may include emulating a set of configuration registers for a set of functions corresponding to a type of peripheral device. The set of functions can include a physical function and a virtual function associated with the physical function. A configuration access request can be processed by retrieving an emulated configuration register from the emulated configuration space, and logging incoming configuration access requests in a configuration transaction log to track configuration accesses.

公开(公告)号：US20230004521A1

公开(公告)日：2023-01-05

申请号：US17901720

申请日：2022-09-01

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Leah Shalev ,  Nafea Bshara ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F15/167 ,  H04L69/22 ,  G06F16/22

Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

公开(公告)号：US11003616B1

公开(公告)日：2021-05-11

申请号：US15635078

申请日：2017-06-27

Applicant: Amazon Technologies, Inc.

Inventor： Guy Nakibly ,  Adi Habusha ,  Yaniv Shapira ,  Daniel Joseph Grey

IPC: G06F13/42 ,  G06F13/40

Abstract: In a computer comprising a plurality of integrated circuits (ICs), each IC may be connected to all other ICs via a respective point-to-point interconnect. A source IC divides the data to be transmitted to a destination IC for a transaction to generate multiple data cells so that each data cell includes a different portion of the data. The source IC transmits one of the data cells to the destination IC and remaining data cells to intermediate ICs, wherein an intermediate IC is an IC other than the source IC or the destination IC. The intermediate ICs forward the remaining data cells to the destination IC.

公开(公告)号：US20210124710A1

公开(公告)日：2021-04-29

申请号：US17139621

申请日：2020-12-31

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Leah Shalev ,  Nafea Bshara ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F15/167 ,  H04L29/06 ,  G06F16/22

Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.