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公开(公告)号：US12130527B2
公开(公告)日：2024-10-29
申请号：US18465273
申请日：2023-09-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Minghua Xuan , Dongni Liu , Haoliang Zheng , Li Xiao , Zhenyu Zhang , Hao Chen , Ke Wang
IPC: G02F1/1362 , H10K59/131
CPC classification number: G02F1/136286 , H10K59/131
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
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公开(公告)号：US12113076B2
公开(公告)日：2024-10-08
申请号：US17514265
申请日：2021-10-29
Inventor： Liang Chen , Jincheng Gao , Haijiao Qian , Tao Jiang , Zexu Liu , Tao Wang , Lixing Zhao , Guanyong Zhang , Quanzhou Liu , Jiantao Liu
IPC: H01L27/12 , H01L21/311
CPC classification number: H01L27/1248 , H01L21/31116 , H01L21/31138 , H01L27/1262 , H01L27/124
Abstract: Embodiments of the disclosure provide a display substrate and a method for manufacturing the same. The display substrate includes: a base substrate; a thin film transistor including a source-drain metal layer and a first insulating layer; a second insulating layer; a color resist layer; and a third insulating layer. The third insulating layer comprises a first via hole that sequentially penetrates the third insulating layer, the color resist layer and the second insulating layer and thus extends from the third insulating layer to the source-drain metal layer. A sidewall of the first via hole comprises a first portion formed of a material of the second insulating layer, a second portion formed of a material of the color resist layer, and a third portion formed of a material of the third insulating layer, the second portion is between the first portion and the third portion.
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公开(公告)号：US12073772B2
公开(公告)日：2024-08-27
申请号：US17511335
申请日：2021-10-26
Applicant: BOE Technology Group Co., Ltd.
Inventor： Haoliang Zheng , Minghua Xuan , Dongni Liu , SeungWoo Han , Li Xiao , Liang Chen , Hao Chen , Jiao Zhao , Qi Qi
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0452 , G09G2310/0275 , G09G2310/0297
Abstract: Disclosed is an array substrate including multiple first selection circuits with each including at least two first selection transistors and at least two first anticreeping transistors. Each first selection transistor is connected with one first anticreeping transistor in series. When the first selection transistor is turned on by a first turn-on signal from a first control signal terminal, the first anticreeping transistor is turned on by a second turn-on signal from a second control signal terminal. When the first selection transistor is turned off by a first turn-off signal from the first control signal terminal, the first anticreeping transistor is turned off to make the first selection transistors and the data signal terminal disconnected, by a second turn-off signal from the second control signal terminal. A voltage of the first turn-off signal is greater than a voltage of the second turn-off signal.
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公开(公告)号：US11869413B2
公开(公告)日：2024-01-09
申请号：US17652660
申请日：2022-02-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ning Cong , Minghua Xuan , Han Yue , Ming Yang , Xiaochuan Chen , Can Zhang , Can Wang , Liang Chen , Detao Zhao
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0452 , G09G2310/0205 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2320/0233
Abstract: An array substrate including a plurality of pixel units arranged in a matrix is provided. Each pixel unit at least includes a first sub-pixel, a second sub-pixel and a third sub-pixel that emit light of different colors, the first sub-pixel has a lower luminous efficiency than the second and third sub-pixels. The array substrate further comprises a plurality of first gate lines and a plurality of second gate lines that correspond to respective rows of pixel units of the plurality of pixel units. The first sub-pixel in each row of pixel units of the plurality of pixel units is coupled to a first gate line of the plurality of first gate lines, and the second sub-pixel and the third sub-pixel in the row of pixel units of the plurality of pixel units are both coupled to a second gate line of the plurality of second gate lines.
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公开(公告)号：US11796877B2
公开(公告)日：2023-10-24
申请号：US17984469
申请日：2022-11-10
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Minghua Xuan , Dongni Liu , Haoliang Zheng , Li Xiao , Zhenyu Zhang , Hao Chen , Ke Wang
IPC: G02F1/1362 , H10K59/131
CPC classification number: G02F1/136286 , H10K59/131
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
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Patent Agency Ranking
公开(公告)号：US11688347B2
公开(公告)日：2023-06-27
申请号：US17620398
申请日：2020-11-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Li Xiao , Haoliang Zheng , Hao Chen , Minghua Xuan , Dongni Liu , Seungwoo Han , Liang Chen , Jiao Zhao , Xue Dong
IPC: G09G3/3258 , G09G3/3291
CPC classification number: G09G3/3258 , G09G3/3291
Abstract: A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.
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公开(公告)号：US11688336B2
公开(公告)日：2023-06-27
申请号：US17744965
申请日：2022-05-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiao Zhao , Li Xiao , Minghua Xuan , Haoliang Zheng , Dongni Liu , Jing Liu , Qi Qi , Zhenyu Zhang , Liang Chen , Hao Chen , Lijun Yuan
CPC classification number: G09G3/32 , G11C19/28 , H01L25/0753 , H01L27/0296 , H01L27/124 , H01L33/62 , G09G2300/026 , G09G2310/0286 , G09G2330/04
Abstract: An array substrate includes pixel group(s) and pixel circuit group(s), each pixel group includes pixels, and each pixel includes sub-pixel(s). At least two pixel groups are arranged in a row direction; in a column direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on a plane does not overlap. Or, the at least two pixel groups are arranged in the column direction; in the row direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on another plane does not overlap.
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公开(公告)号：US11670643B2
公开(公告)日：2023-06-06
申请号：US17500748
申请日：2021-10-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Dongni Liu , Liang Chen , Minghua Xuan , Haoliang Zheng , Qi Qi , Jing Liu
CPC classification number: H01L27/124 , G09G3/32 , G09G3/3446 , G09G3/3453 , H01L25/167 , G09G2300/0426 , G09G2300/0465 , G09G2300/0809
Abstract: A driving backplane, a display panel and a display device are disclosed. The driving backplane includes: a base substrate; a plurality of pixel driving circuits located on the base substrate; an electrode located on a side of each of the pixel driving circuits facing away from the base substrate and coupled with the pixel driving circuits; and a potential wire located between the electrode and the base substrate and coupled with the pixel driving circuits. Every at least two pixel driving circuits are coupled with a same signal line through a multiplexing controller, an orthographic projection of the controller on the base substrate completely falls into a range of a corresponding micro light emitting diode bonding region, and an orthographic projection of a control wire coupled with the controller on the base substrate completely falls into a range of an orthographic projection of the potential wire on the base substrate.
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公开(公告)号：US11616043B2
公开(公告)日：2023-03-28
申请号：US17057351
申请日：2020-02-11
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Lei Wang , Minghua Xuan , Li Xiao , Dongni Liu , Detao Zhao , Hao Chen
Abstract: A chip transfer method including: disposing a target substrate in a closed cavity, the target substrate including a first alignment bonding structure and a second alignment bonding structure; applying a charge of a first polarity to the first alignment bonding structure of the target substrate; applying a charge of a second polarity to a first chip bonding structure of a chip; injecting an insulating fluid into the closed cavity to suspend the chip in the insulating fluid within the closed cavity; and applying a bonding force to the chip.
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公开(公告)号：US11508294B2
公开(公告)日：2022-11-22
申请号：US17530101
申请日：2021-11-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jiao Zhao , Seungwoo Han , Haoliang Zheng , Minghua Xuan , Li Xiao , Dongni Liu , Liang Chen , Hao Chen
IPC: G09G3/32
Abstract: The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.
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