Abstract:
The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
Abstract:
The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
Abstract:
An array substrate includes pixel group(s) and pixel circuit group(s), each pixel group includes pixels, and each pixel includes sub-pixel(s). At least two pixel groups are arranged in a row direction; in a column direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on a plane does not overlap. Or, the at least two pixel groups are arranged in the column direction; in the row direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on another plane does not overlap.
Abstract:
The present application discloses a backlight module for a display apparatus. The backlight module for a display apparatus includes a light guide plate; and a light transmittance control layer on the light guide plate configured to receive light from the light guide plate and modulate light intensity of the light from the light guide plate. The light transmittance control layer includes a light transmittance control material having a variable light transmissivity. Light transmittance in a plurality of regions of the light transmittance control layer is individually controllable.
Abstract:
An embodiment of the present invention provides a 3D panel. The 3D panel includes a first substrate, a second substrate, and liquid crystals configured to be filled between the first substrate and the second substrate, wherein both the first substrate and the second substrate are provided with a common electrode and a signal electrode. Since the substrates at two sides of the 3D panel of the present invention have electrodes which can be independently controlled, the switching of a grating electrode function between the upper and lower substrates can be achieved by switching the signal to the two substrates, thereby improving the application range of the 3D panel and the compatibility and versatility of the 3D panel. In addition, the embodiments of the present invention also disclose a method for producing the 3D panel and a 3D display apparatus having the 3D panel.
Abstract:
A displaying base plate and a displaying device are provided by the present application, wherein the displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate.
Abstract:
A display substrate includes a plurality of pixel circuits arranged in an array and a plurality of light emitting devices provided on a substrate, and at least one pixel circuit is connected to a corresponding light emitting device through a conductive structure. At least some of the pixel circuits in at least one column include a first pixel circuit and a second pixel circuit arranged on a side of the first pixel circuit away from the substrate, orthographic projections of the second pixel circuit and the first pixel circuit on the substrate partially overlap to form an overlapping portion defining a first pattern, and an orthographic projection of a conductive structure of the first pixel circuit on the substrate, the first pattern, and an orthographic projection of a conductive structure of the second pixel circuit on the substrate are sequentially arranged in a first direction.
Abstract:
A display device, a gate drive circuit, a shift register and a control method are disclosed. The shift register includes a first shift register unit and a second shift register unit, the first shift register unit is configured to write a first control signal to the first node, and write a first clock signal to the first signal output terminal under control of a voltage of the first node; the second shift register unit is configured to write a second clock signal to the second signal output terminal under control of the voltage of the first node; during time of a frame, the first clock signal and a first input signal provided by a first signal input terminal are pulse signals, and the second clock signal is a DC signal.
Abstract:
The present application provides a method for detecting a broken fanout wire of a display substrate, and a display substrate, and belongs to the field of display technology. In the method for detecting a broken fanout wire, the display substrate includes a base substrate having first and second surfaces opposite to each other, and a plurality of connection structures disposed at intervals on the first surface; and each connection structure includes first and second pads and a fanout wire electrically connecting the first pad to the second pad. The method for detecting a broken fanout wire includes: forming at least one detection unit, which includes: connecting at least two connection structures in series through a connecting part; and measuring a head and an end of the detection unit to obtain resistance of the detection unit, and determining whether there is a broken fanout wire in the detection unit.
Abstract:
A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).