Pixel driving circuit, driving method, array substrate and display apparatus
    31.
    发明授权
    Pixel driving circuit, driving method, array substrate and display apparatus 有权
    像素驱动电路,驱动方法,阵列基板和显示装置

    公开(公告)号:US09501973B2

    公开(公告)日:2016-11-22

    申请号:US14652343

    申请日:2014-09-30

    IPC分类号: G09G3/3233 G09G3/32

    摘要: A pixel driving circuit, array substrate and display apparatus, comprise: data line for providing data voltage; gate line for providing scanning voltage; first power supply line for providing first power supply voltage; second power supply line for providing second power supply voltage; light emitting device connected to second power supply line; driving transistor connected to first power supply line; storage capacitor having first terminal connected to gate of driving transistor and configured to transfer information to gate of driving transistor; resetting unit configured to reset voltage across storage capacitor as predetermined signal voltage; data writing unit configured to write information into second terminal of storage capacitor; compensating unit configured to write information into first terminal of storage capacitor; and light emitting control unit configured to write first power supply voltage into second terminal of storage capacitor and control driving transistor to drive light emitting device to emit light.

    摘要翻译: 像素驱动电路,阵列基板和显示装置包括:用于提供数据电压的数据线; 提供扫描电压的栅极线; 第一电源线,用于提供第一电源电压; 用于提供第二电源电压的第二电源线; 发光装置连接到第二电源线; 驱动晶体管连接到第一电源线; 存储电容器,其第一端子连接到驱动晶体管的栅极并且被配置为将信息传送到驱动晶体管的栅极; 复位单元,被配置为将存储电容器两端的电压复位为预定的信号电压; 数据写入单元,被配置为将信息写入存储电容器的第二端; 补偿单元,被配置为将信息写入存储电容器的第一端子; 以及发光控制单元,被配置为将第一电源电压写入存储电容器的第二端子,并且控制驱动晶体管以驱动发光器件发光。

    SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT, DISPLAY APPARATUS
    32.
    发明申请
    SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT, DISPLAY APPARATUS 有权
    移位寄存器及其驱动方法,门驱动电路,显示设备

    公开(公告)号:US20160225341A1

    公开(公告)日:2016-08-04

    申请号:US15021990

    申请日:2015-09-25

    发明人: Zhanjie Ma Tuo Sun

    IPC分类号: G09G5/00

    摘要: A shift register and its driving method, a gate driving circuit, and a display apparatus, the shift register includes an input module (1), an output module (2) and an output control module (3); the output module (2) includes a first output unit (21) and a second output unit (22); and the output control module (3) comprises a first control unit (31) and a second control unit (32), the first control unit (31) controls the level of the first node (P), and the second control unit (32) controls the level of the second node (Q). The technical solutions of the present disclosure can diminish influence of the changing of the clock signal associated with the output module on the output signal, and improve the output effect of the shift register.

    摘要翻译: 移位寄存器及其驱动方法,门驱动电路和显示装置,移位寄存器包括输入模块(1),输出模块(2)和输出控制模块(3)。 输出模块(2)包括第一输出单元(21)和第二输出单元(22); 并且所述输出控制模块(3)包括第一控制单元(31)和第二控制单元(32),所述第一控制单元(31)控制所述第一节点(P)的电平,所述第二控制单元 )控制第二节点(Q)的电平。 本公开的技术方案可以减少与输出模块相关的时钟信号对输出信号的变化的影响,并且提高移位寄存器的输出效果。

    DISPLAY DRIVE SIGNAL COMPENSATING METHOD, DISPLAY DRIVE SIGNAL COMPENSATING DEVICE FOR CARRYING OUT SUCH METHOD, AND DISPLAY COMPRISING SUCH DEVICE
    33.
    发明申请
    DISPLAY DRIVE SIGNAL COMPENSATING METHOD, DISPLAY DRIVE SIGNAL COMPENSATING DEVICE FOR CARRYING OUT SUCH METHOD, AND DISPLAY COMPRISING SUCH DEVICE 有权
    显示驱动信号补偿方法,用于执行这种方法的显示驱动信号补偿装置以及包含这些装置的显示

    公开(公告)号:US20150302817A1

    公开(公告)日:2015-10-22

    申请号:US14316252

    申请日:2014-06-26

    发明人: Tuo Sun

    IPC分类号: G09G3/36

    摘要: The present invention relates to liquid crystal display manufacturing technology. There provides a display drive signal compensating method, comprising the steps of: acquiring an original drive signal of every row of input pixels in a display; determining a position of the row of input pixels, based on the original drive signal; generating a compensation signal for compensating the original drive signal, based on a transmission line internal resistance at the position of the row of input pixels; and outputting a superposed signal obtained by superposing the compensation signal on the original drive signal to the row of input pixels. This method can compensates a voltage drop of the drive signal resulted by the transmission line internal resistance and thus improves the display effect. Meanwhile, there also provide a display drive signal compensating device for carrying out the abovementioned method, and correspondingly, a display comprising such device.

    摘要翻译: 本发明涉及液晶显示器制造技术。 提供了一种显示驱动信号补偿方法,包括以下步骤:获取显示器中每行输入像素的原始驱动信号; 基于原始驱动信号确定输入像素行的位置; 基于输入像素行的位置处的传输线内部电阻产生用于补偿原始驱动信号的补偿信号; 并输出通过将原始驱动信号上的补偿信号叠加到输入像素行而获得的叠加信号。 该方法可以补偿由传输线内阻导致的驱动信号的电压降,从而提高显示效果。 同时,还提供了用于执行上述方法的显示驱动信号补偿装置,并且相应地提供包括这种装置的显示器。

    Polysilicon thin film and manufacturing method thereof, array substrate and display device
    34.
    发明授权
    Polysilicon thin film and manufacturing method thereof, array substrate and display device 有权
    多晶硅薄膜及其制造方法,阵列基板及显示装置

    公开(公告)号:US09142409B2

    公开(公告)日:2015-09-22

    申请号:US13963112

    申请日:2013-08-09

    发明人: Tuo Sun

    摘要: A polysilicon thin film and a manufacturing method thereof, an array substrate and a display device are disclosed. The manufacturing method of the polysilicon thin film comprises the following steps: forming a graphene layer and an amorphous silicon layer which are adjacent; forming polysilicon by way of crystallizing amorphous silicon so as to obtain the polysilicon thin film. The polysilicon thin film manufactured by the method possesses good characteristics.

    摘要翻译: 公开了一种多晶硅薄膜及其制造方法,阵列基板和显示装置。 多晶硅薄膜的制造方法包括以下步骤:形成相邻的石墨烯层和非晶硅层; 通过结晶非晶硅形成多晶硅以获得多晶硅薄膜。 通过该方法制造的多晶硅薄膜具有良好的特性。

    Phase shifter, antenna, and control method of phase shifter

    公开(公告)号:US11728552B2

    公开(公告)日:2023-08-15

    申请号:US16425651

    申请日:2019-05-29

    发明人: Tuo Sun

    IPC分类号: H01P1/18 H01Q3/36

    CPC分类号: H01P1/184 H01Q3/36

    摘要: The present disclosure provides a phase shifter, an antenna including the phase shifter, and a control method of the phase shifter. The phase shifter includes a first base substrate; a plurality of microstrip lines arranged on the first base substrate and configured to transmit an electromagnetic wave signal and apply a common voltage; a dielectric layer arranged on a side of the plurality of microstrip lines away from the first base substrate; and a plurality of separate voltage control layers correspondingly arranged with the plurality of microstrip lines respectively on a side of the dielectric layer away from the first base substrate. The separate voltage control layers are configured to apply a control voltage. A dielectric constant of the dielectric layer varies with the control voltage applied to the voltage control layers and the common voltage applied to the microstrip lines.

    Array substrate and manufacturing method therefor, and display panel

    公开(公告)号:US11637262B2

    公开(公告)日:2023-04-25

    申请号:US17264897

    申请日:2020-05-29

    IPC分类号: H01L51/50 H01L27/32 H01L51/56

    摘要: Embodiments of the present disclosure provide an array substrate and a manufacturing method therefor, and a display panel. The array substrate includes: a substrate and a pixel defining layer provided on the substrate, the pixel defining layer including a plurality of opening areas, and the plurality of opening areas being provided with a plurality of quantum dot light-emitting devices in a one-to-one correspondence manner; each of the quantum dot light-emitting devices includes a quantum dot light-emitting layer, and the quantum dot light-emitting layer is made of a quantum dot material. At least one of the pixel defining layer and the quantum dot material is magnetic.

    BACK PLATE AND ANODE BACK PLATE FOR 3D PRINTING

    公开(公告)号:US20230021559A1

    公开(公告)日:2023-01-26

    申请号:US17770590

    申请日:2021-03-15

    IPC分类号: H01L27/12

    摘要: A back plate includes a base substrate, gate lines, data lines and power supply lines arranged on the base substrate crossing each other in rows and columns, and pixel structures arranged in an array on the base substrate, each pixel structure includes a driving transistor, a switching transistor connected thereto, and a pixel electrode connected thereto; a gate line and a data line are connected to the switching transistor, and a power supply line is connected to the driving transistor; in a same row or column of pixel structures, a power supply line is arranged between an (2n−1)th pixel structure and an 2n−th pixel structure, and the power supply line is connected to a source electrode of a driving transistor in the (2n−1)th pixel structure and a source electrode of a driving transistor in the 2n−th pixel structure; n is a positive integer greater than or equal to 1.

    Liquid crystal antenna and its manufacturing method

    公开(公告)号:US11362416B2

    公开(公告)日:2022-06-14

    申请号:US16912506

    申请日:2020-06-25

    发明人: Kui Liang Tuo Sun

    IPC分类号: H01Q1/36

    摘要: A liquid crystal antenna includes a first substrate, a second substrate, and liquid crystals arranged between the first substrate and the second substrate. First protrusions and second protrusions are arranged at a surface of the second substrate facing the first substrate, a size of each first protrusion in a first direction is substantially greater than a size of each second protrusion in the first direction, and the first direction is a direction perpendicularly from the second substrate to the first substrate. A run-through labyrinth-type gap is defined by the first protrusions at a surface of the second substrate, and each second protrusion is arranged in the labyrinth-type gap.

    SHIFT REGISTER UNIT, SCAN DRIVING CIRCUIT, DRIVING METHOD THEREOF, AND DISPLAY APPARATUS

    公开(公告)号:US20210335180A1

    公开(公告)日:2021-10-28

    申请号:US16618261

    申请日:2019-05-17

    发明人: Tuo Sun

    IPC分类号: G09G3/20 G11C19/28

    摘要: The present disclosure relates to a shift register unit having a cascade input terminal, a cascade output terminal and a scan output terminal. The shift register unit may include a first shift circuit, a second shift circuit, an input circuit, and a control circuit. The input circuit may be configured to provide an input signal from the cascade input terminal to an input terminal of the first shift circuit under control of an input clock terminal. The control circuit may be configured to control connection of an output terminal of the first shift circuit and an input terminal of the second shift circuit based on a signal at a first control terminal.