Abstract:
A display substrate having a display area and a gate-on-array (GOA) area outside the display area is provided. The display substrate includes a base substrate; a plurality of GOA signal lines on the base substrate and in the GOA area; and a first signal line in the GOA area, at least a portion of the first signal line being on a side of the plurality of GOA signal lines away from the base substrate. An orthographic projection of the first signal line on the base substrate at least partially covers an orthographic projection of at least one of a first clock signal line, a second clock signal line, a start signal line, a high voltage power line, or a low voltage power line on the base substrate.
Abstract:
The present disclosure provides an organic light-emitting diode display substrate and a manufacturing method thereof. The manufacturing method includes: sequentially forming a first electrode, a light-emitting layer and a second electrode on a base substrate; forming a protection layer having a first opening on a side of the second electrode distal to the base substrate; and forming a second opening in the second electrode, the second opening being located below the first opening. In the present disclosure, with the protection layer, only a portion of the second electrode below the first opening is removed, so that other portions of the second electrode are prevented from being damaged, thereby eliminating a poor display of the display device.
Abstract:
The present invention provides an array substrate. The array substrate includes: a backplane including a display area and a bonding area; a wiring layer provided on the backplane and exposed in the bonding area; a protective layer provided on a surface of the wiring layer away from the backplane and covering the wiring layer in the display area and the bonding area, wherein a through-hole is provided in the protective layer in the boding area; and a connection layer provided on a surface of the protective layer away from the backplane and coupled to the wiring layer through the through-hole.
Abstract:
Embodiments of the present disclosure provide an array substrate including a base substrate, an active layer on the base substrate, a first gate insulating layer on the active layer, a first gate on the first gate insulating layer, and a second gate insulating layer on the first gate. The second gate insulating layer includes a first sub-insulating layer and a second sub-insulating layer disposed in a direction away from the active layer, and a hydrogen content of the first sub-insulating layer is larger than a hydrogen content of the second sub-insulating layer. A method for fabricating the array substrate and a display panel including the array substrate are also provided.
Abstract:
A display panel is disclosed. The display panel includes a flexible substrate; a display sub-region on the flexible substrate including a light emitting device; a peripheral region of the display sub-region spacing the display sub-region from an adjacent display sub-region; and a current compensator in the peripheral region for compensating a current flowing through the light emitting device of the display sub-region in response to deformation of the flexible substrate.
Abstract:
The present application discloses a method of fabricating a polycrystalline semiconductor layer, comprising forming a heat storage layer; forming a buffer layer on the heat storage layer; forming a first amorphous semiconductor layer on a side of the buffer layer distal to the heat storage layer; and crystallizing the first amorphous semiconductor layer to form a first polycrystalline semiconductor layer.
Abstract:
The present application discloses a method of fabricating a polycrystalline semiconductor layer, comprising forming a heat storage layer; forming a buffer layer on the heat storage layer; forming a first amorphous semiconductor layer on a side of the buffer layer distal to the heat storage layer; and crystallizing the first amorphous semiconductor layer to form a first polycrystalline semiconductor layer.
Abstract:
A conductive structure and a manufacturing method thereof, an array substrate and a display device. The conductive structure includes a plurality of first metal layers made of aluminum, and between every two first metal layers that are adjacent, there is also provided a second metal layer, which is made of a metal other than aluminum. With the conductive structure, the hillock phenomenon that happens to the conductive structure when it is heated can be decreased without reducing the overall thickness of the conductive structure.
Abstract:
A pixel driving circuit is provided. The pixel driving circuit includes a light emission control circuit and a drive circuit. The light emission control circuit controls a potential of a control terminal of the drive circuit under the control of a coupled signal terminal, and the drive circuit drives a coupled light-emitting element to emit light based on the potential of the control terminal thereof. The drive circuit includes two drive transistors connected in parallel, and subthreshold swings of the two drive transistors are different.
Abstract:
The present disclosure provides a displaying backplane and a displaying device, and relates to the technical field of displaying. The displaying backplane includes: a substrate base plate; a first active layer and a second active layer that are provided on the substrate base plate, wherein the material of the first active layer and the second active layer is an oxide semiconductor, the first active layer has a first channel region and first no-channel regions, and the second active layer has a second channel region and second no-channel regions; a first grid insulating layer covering the first active layer and the second active layer; and a first grid and a second grid that are provided on the first grid insulating layer; wherein the oxygen-vacancy concentration of the first channel region is greater than the oxygen-vacancy concentrations of the first no-channel regions, the second no-channel regions and the second channel region.