公开(公告)号：US10552755B2

公开(公告)日：2020-02-04

申请号：US14829342

申请日：2015-08-18

Applicant: D-Wave Systems Inc.

Inventor： Trevor Michael Lanting ,  Andrew King

IPC: H01L27/18 ,  G06N10/00 ,  G06F15/82

Abstract: Techniques for improving the performance of a quantum processor are described. Some techniques employ reducing intrinsic/control errors by using quantum processor-wide problems specifically crafted to reveal errors so that corrections may be applied. Corrections may be applied to physical qubits, logical qubits, and couplers so that problems may be solved using quantum processors with greater accuracy.

公开(公告)号：US10068180B2

公开(公告)日：2018-09-04

申请号：US14896259

申请日：2013-10-22

Applicant: D-Wave Systems Inc.

Inventor： Mohammad H. S. Amin ,  Andrew J. Berkley ,  Richard G. Harris ,  Trevor Michael Lanting ,  Anatoly Yu Smirnov

IPC: G06F15/82 ,  G06N99/00

Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.

公开(公告)号：US10002107B2

公开(公告)日：2018-06-19

申请号：US14643180

申请日：2015-03-10

Applicant: D-Wave Systems Inc.

Inventor： Trevor Michael Lanting

IPC: G06F17/00 ,  G06N99/00 ,  G06F15/82

CPC classification number: G06F17/00 ,  G06F15/82 ,  G06N10/00

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton. Also, for example, a quantum processor may be summarized as including a first loop of superconducting material, a first compound Josephson junction interrupting the first loop of superconducting material, a first coupler inductively coupled to the first loop of superconducting material, a second coupler inductively coupled to the first loop of superconducting material, and a second loop of superconducting material proximally placed to the first loop of superconducting material inductively coupled to the first coupler and the second coupler.

公开(公告)号：US20150032993A1

公开(公告)日：2015-01-29

申请号：US14339289

申请日：2014-07-23

Applicant: D-WAVE SYSTEMS INC.

Inventor： Mohammad H.S. Amin ,  Trevor Michael Lanting ,  Colin Enderud

IPC: G06F15/82 ,  G06N99/00

CPC classification number: G06N99/002

Abstract: Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.

Abstract translation: 实现逻辑量子位的非正交量子比特参数的正交控制允许增加量子比特链的长度，从而增加量子比特链的有效连接性。 通过将专用的第二量子比特通信地耦合到第一量子比特来形成混合量子比特。 通过调整混合量子比特的第二量子位的可编程参数，调整混合量子比特的有效可编程参数，而不影响混合量子比特的另一有效可编程参数，从而实现非正交量子比特参数的正交控制。 因此，可以通过将多个这样的混合量子位通信地耦合在一起来增加逻辑量子位的长度。

公开(公告)号：US11861455B2

公开(公告)日：2024-01-02

申请号：US16858108

申请日：2020-04-24

Applicant: D-WAVE SYSTEMS INC.

Inventor： Sheir Yarkoni ,  Trevor Michael Lanting ,  Kelly T. R. Boothby ,  Andrew Douglas King ,  Evgeny A. Andriyash ,  Mohammad H. Amin

IPC: G06N10/00 ,  G06N7/08 ,  G06N3/044 ,  G06N3/047 ,  B82Y10/00

CPC classification number: G06N10/00 ,  B82Y10/00 ,  G06N3/044 ,  G06N3/047 ,  G06N7/08

Abstract: A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.

公开(公告)号：US11423115B2

公开(公告)日：2022-08-23

申请号：US17007395

申请日：2020-08-31

Applicant: D-WAVE SYSTEMS INC.

Inventor： Trevor Michael Lanting

IPC: G06F17/00 ,  G06F15/82 ,  G06N10/00

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton. Also, for example, a quantum processor may be summarized as including a first loop of superconducting material, a first compound Josephson junction interrupting the first loop of superconducting material, a first coupler inductively coupled to the first loop of superconducting material, a second coupler inductively coupled to the first loop of superconducting material, and a second loop of superconducting material proximally placed to the first loop of superconducting material inductively coupled to the first coupler and the second coupler.

公开(公告)号：US20220222558A1

公开(公告)日：2022-07-14

申请号：US17584600

申请日：2022-01-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： Steven P. Reinhardt ,  Andrew D. King ,  Loren J. Swenson ,  Warren T.E. Wilkinson ,  Trevor Michael Lanting

IPC: G06N10/00 ,  G05B19/042

Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.

公开(公告)号：US10671937B2

公开(公告)日：2020-06-02

申请号：US16308314

申请日：2017-06-07

Applicant: Sheir Yarkoni ,  D-WAVE SYSTEMS INC.

Inventor： Sheir Yarkoni ,  Trevor Michael Lanting ,  Kelly T. R. Boothby ,  Andrew Douglas King ,  Evgeny A. Andriyash ,  Mohammad H. Amin

IPC: G06N10/00 ,  B82Y10/00 ,  G06N7/08 ,  G06N3/04

Abstract: A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.

公开(公告)号：US20200125625A1

公开(公告)日：2020-04-23

申请号：US16673478

申请日：2019-11-04

Applicant: D-WAVE SYSTEMS INC.

Inventor： Trevor Michael Lanting

IPC: G06F17/00 ,  G06N10/00 ,  G06F15/82

Abstract: Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton. Also, for example, a quantum processor may be summarized as including a first loop of superconducting material, a first compound Josephson junction interrupting the first loop of superconducting material, a first coupler inductively coupled to the first loop of superconducting material, a second coupler inductively coupled to the first loop of superconducting material, and a second loop of superconducting material proximally placed to the first loop of superconducting material inductively coupled to the first coupler and the second coupler.

公开(公告)号：US10454015B2

公开(公告)日：2019-10-22

申请号：US15503367

申请日：2015-08-12

Applicant: D-Wave Systems Inc.

Inventor： Trevor Michael Lanting ,  Eric G. Ladizinsky ,  J. Jason Yao ,  Byong Hyop Oh

IPC: H01L39/24 ,  H01L27/18 ,  H01L39/22 ,  H01L21/768 ,  H01L23/532

Abstract: Fabricating wiring layers above a Josephson junction multi-layer may include removing a part of the multilayer; depositing an insulating layer to overlie a part of the multilayer; and patterning the insulating layer to define a hole in the insulating layer. The method includes depositing a first superconducting wiring layer over a part of the insulating layer and within a portion of the hole. Further, insulating and wiring layers may be deposited and a topmost wiring layer defined. The method includes depositing a passivating layer to overlie the topmost wiring layer. Fabricating a superconducting integrated circuit comprising a hybrid dielectric system may include depositing a high-quality dielectric layer that overlies a superconducting feature. The method includes depositing a second dielectric layer that overlies at least part of the high-quality dielectric layer. The second dielectric layer can comprise a conventional dielectric material.