Systems and methods for degeneracy mitigation in a quantum processor

    公开(公告)号:US11100416B2

    公开(公告)日:2021-08-24

    申请号:US15771606

    申请日:2016-10-27

    IPC分类号: G06N10/00

    摘要: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

    Systems and devices for quantum processor architectures
    2.
    发明授权
    Systems and devices for quantum processor architectures 有权
    量子处理器架构的系统和设备

    公开(公告)号:US09183508B2

    公开(公告)日:2015-11-10

    申请号:US14453883

    申请日:2014-08-07

    摘要: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Angular deviations between qubits in one set may allow qubits in the same set to cross one another. Each unit cell is positioned proximally adjacent at least one other unit cell. Communicatively coupling between qubits is realized through respective intra-cell and inter-cell coupling devices.

    摘要翻译: 量子处理器架构采用平铺在一个区域上的单位单元。 单元单元可以包括第一组和第二组量子位,其中第一组中的每个量子位与第二组中的至少一个量子位交叉。 一组中量子位之间的角度偏差可能允许同一组中的量子位彼此交叉。 每个单位单元位于邻近至少一个其他单位单元的近侧。 通过相应的小区内和小区间耦合设备来实现量子位之间的通信耦合。

    SYSTEMS AND METHODS FOR DEGENERACY MITIGATION IN A QUANTUM PROCESSOR

    公开(公告)号:US20210350269A1

    公开(公告)日:2021-11-11

    申请号:US17379172

    申请日:2021-07-19

    IPC分类号: G06N10/00

    摘要: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

    Systems and methods for increasing analog processor connectivity

    公开(公告)号:US10268622B2

    公开(公告)日:2019-04-23

    申请号:US15418497

    申请日:2017-01-27

    IPC分类号: G06F13/40 G06F13/36 G06N99/00

    摘要: Topologies for analog computing systems are provided. Qubits in the topology are grouped into cells, and cells are coupled to adjacent cells by inter-cell couplers. At least some cells are coupled to non-adjacent cells via long-range couplers. Long-range couplers may be arranged into coverings so that certain sets of qubits within a covering region may be coupled with a reduced number of couplers. Each cell within a covering region without a long-range coupler may be proximate to a cell with a long range coupler so that each cell within the covering region is no more than a certain coupling distance away from a long-range coupler. Long-range couplers may couple over a greater physical distance than inter-cell couplers. Long-range couplers may couple to qubits over a larger coupling region, and may extend across multiple crossing regions between qubits.

    SYSTEMS AND DEVICES FOR QUANTUM PROCESSOR ARCHITECTURES

    公开(公告)号:US20160012347A1

    公开(公告)日:2016-01-14

    申请号:US14863045

    申请日:2015-09-23

    IPC分类号: G06N99/00 G06F15/76

    摘要: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Angular deviations between qubits in one set may allow qubits in the same set to cross one another. Each unit cell is positioned proximally adjacent at least one other unit cell. Communicatively coupling between qubits is realized through respective intra-cell and inter-cell coupling devices.

    Systems and methods for degeneracy mitigation in a quantum processor

    公开(公告)号:US11681940B2

    公开(公告)日:2023-06-20

    申请号:US17379172

    申请日:2021-07-19

    IPC分类号: G06N10/00 G06F15/163

    CPC分类号: G06N10/00 G06F15/163

    摘要: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

    SYSTEMS AND METHODS FOR DEGENERACY MITIGATION IN A QUANTUM PROCESSOR

    公开(公告)号:US20180330264A1

    公开(公告)日:2018-11-15

    申请号:US15771606

    申请日:2016-10-27

    IPC分类号: G06N99/00 G06F15/163

    CPC分类号: G06N99/002

    摘要: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

    SYSTEMS AND DEVICES FOR QUANTUM PROCESSOR ARCHITECTURES

    公开(公告)号:US20170091650A1

    公开(公告)日:2017-03-30

    申请号:US15373910

    申请日:2016-12-09

    IPC分类号: G06N99/00 G06F15/76

    摘要: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Angular deviations between qubits in one set may allow qubits in the same set to cross one another. Each unit cell is positioned proximally adjacent at least one other unit cell. Communicatively coupling between qubits is realized through respective intra-cell and inter-cell coupling devices.