公开(公告)号：US07170084B1

公开(公告)日：2007-01-30

申请号：US10872707

申请日：2004-06-21

申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/66477 ,  H01L21/26586 ,  H01L29/1045 ,  H01L29/1054 ,  H01L29/665

摘要： An n-type MOSFET (NMOS) is implemented on a substrate having an epitaxial layer of strained silicon formed on a layer of silicon germanium. The MOSFET includes first halo regions formed in the strained silicon layer that extent toward the channel region beyond the ends of shallow source and drain extensions. Second halo regions formed in the underlying silicon germanium layer extend toward the channel region beyond the ends of the shallow source and drain extensions and extend deeper into the silicon germanium layer than the shallow source and drain extensions. The p-type dopant of the first and second halo regions slows the high rate of diffusion of the n-type dopant of the shallow source and drain extensions through the silicon germanium toward the channel region. By counteracting the increased diffusion rate of the n-type dopant in this manner, the shallow source and drain extension profiles are maintained and the risk of degradation by short channel effects is reduced.

摘要翻译： 在具有形成在硅锗层上的应变硅的外延层的衬底上实施n型MOSFET（NMOS）。 MOSFET包括形成在应变硅层中的第一晕圈，其范围朝向超过浅源极和漏极延伸端的沟道区域。 形成在下面的硅锗层中的第二晕圈延伸到超过浅源极和漏极延伸端的沟道区，并且比浅源极和漏极延伸部更深地延伸到硅锗层中。 第一和第二晕圈区域的p型掺杂剂减缓了浅源极和漏极延伸部分的n型掺杂剂通过硅锗朝向沟道区的高扩散速率。 通过以这种方式抵消增加的n型掺杂剂的扩散速率，维持浅的源极和漏极延伸分布，并且降低由短沟道效应引起的退化的风险。

公开(公告)号：US06902991B2

公开(公告)日：2005-06-07

申请号：US10282513

申请日：2002-10-24

申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L21/337 ,  H01L29/10 ,  H01L21/04

CPC分类号： H01L29/1054 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/66893

摘要： A strained silicon layer is grown on a layer of silicon germanium and a second layer of silicon germanium is grown on the layer of strained silicon in a single continuous in situ deposition process. Both layers of silicon germanium may be grown in situ with the strained silicon. This construction effectively provides dual substrates at both sides of the strained silicon layer to support the tensile strain of the strained silicon layer and to resist the formation of misfit dislocations that may be induced by temperature changes during processing. Consequently the critical thickness of strained silicon that can be grown on substrates having a given germanium content is effectively doubled. The silicon germanium layer overlying the strained silicon layer may be maintained during MOSFET processing to resist creation of misfit dislocations in the strained silicon layer up to the time of formation of gate insulating material.

摘要翻译： 在硅锗层上生长应变硅层，并且在单个连续原位沉积工艺中，在应变硅层上生长第二层硅锗。 硅锗的两层可以用应变硅原位生长。 这种结构在应变硅层的两侧有效地提供了两个基板，以支撑应变硅层的拉伸应变，并且抵抗可能在加工过程中温度变化引起的失配位错的形成。 因此，可以在具有给定锗含量的衬底上生长的应变硅的临界厚度被有效地加倍。 覆盖应变硅层的硅锗层可以在MOSFET加工过程中保持，以抵抗在形成栅极绝缘材料时产生应变硅层中的失配位错。

公开(公告)号：US06756276B1

公开(公告)日：2004-06-29

申请号：US10335522

申请日：2002-12-31

申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

IPC分类号： H01L21336

CPC分类号： H01L29/66477 ,  H01L21/26586 ,  H01L29/1045 ,  H01L29/1054 ,  H01L29/665

摘要： An n-type MOSFET (NMOS) is implemented on a substrate having an epitaxial layer of strained silicon formed on a layer of silicon germanium. The MOSFET includes first halo regions formed in the strained silicon layer that extent toward the channel region beyond the ends of shallow source and drain extensions. Second halo regions formed in the underlying silicon germanium layer extend toward the channel region beyond the ends of the shallow source and drain extensions and extend deeper into the silicon germanium layer than the shallow source and drain extensions. The p-type dopant of the first and second halo regions slows the high rate of diffusion of the n-type dopant of the shallow source and drain extensions through the silicon germanium toward the channel region. By counteracting the increased diffusion rate of the n-type dopant in this manner, the shallow source and drain extension profiles are maintained and the risk of degradation by short channel effects is reduced.

摘要翻译： 在具有形成在硅锗层上的应变硅的外延层的衬底上实施n型MOSFET（NMOS）。 MOSFET包括形成在应变硅层中的第一晕圈，其范围朝向超过浅源极和漏极延伸端的沟道区域。 形成在下面的硅锗层中的第二晕圈延伸到超过浅源极和漏极延伸端的沟道区，并且比浅源极和漏极延伸部更深地延伸到硅锗层中。 第一和第二晕圈区域的p型掺杂剂减缓了浅源极和漏极延伸部分的n型掺杂剂通过硅锗朝向沟道区的高扩散速率。 通过以这种方式抵消增加的n型掺杂剂的扩散速率，维持浅的源极和漏极延伸分布，并且降低由短沟道效应引起的退化的风险。

公开(公告)号：US06852600B1

公开(公告)日：2005-02-08

申请号：US10726472

申请日：2003-12-02

申请人： Haihong Wang ,  Qi Xiang

发明人： Haihong Wang ,  Qi Xiang

IPC分类号： H01L21/335 ,  H01L21/336 ,  H01L29/10 ,  H01L29/80 ,  H01L21/76

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/802

摘要： A strained silicon MOSFET utilizes a strained silicon layer formed on a silicon geranium layer. Strained silicon and silicon germanium are removed at opposing sides of the gate and are replaced by silicon regions. Deep source and drain regions are implanted in the silicon regions, and the depth of the deep source and drain regions does not extend beyond the depth of the silicon regions. By forming the deep source and drain regions in the silicon regions, detrimental effects of the higher dielectric constant and lower band gap of silicon geranium are reduced.

摘要翻译： 应变硅MOSFET利用形成在硅天竺葵层上的应变硅层。 应变硅和硅锗在栅极的相对侧被去除并被硅区域代替。 深源极和漏极区域被注入到硅区域中，并且深源极和漏极区域的深度不延伸超过硅区域的深度。 通过在硅区域形成深源极和漏极区域，降低了硅天竺葵的较高介电常数和较低带隙的有害影响。

公开(公告)号：US06657223B1

公开(公告)日：2003-12-02

申请号：US10282538

申请日：2002-10-29

申请人： Haihong Wang ,  Qi Xiang

发明人： Haihong Wang ,  Qi Xiang

IPC分类号： H01L2906

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/802

摘要： A strained silicon MOSFET utilizes a strained silicon layer formed on a silicon germanium layer. Strained silicon and silicon germanium are removed at opposing sides of the gate and are replaced by silicon regions. Deep source and drain regions are implanted in the silicon regions, and the depth of the deep source and drain regions does not extend beyond the depth of the silicon regions. By forming the deep source and drain regions in the silicon regions, detrimental effects of the higher dielectric constant and lower band gap of silicon germanium are reduced.

摘要翻译： 应变硅MOSFET利用在硅锗层上形成的应变硅层。 应变硅和硅锗在栅极的相对侧被去除并被硅区域代替。 深源极和漏极区域被注入到硅区域中，并且深源极和漏极区域的深度不延伸超过硅区域的深度。 通过在硅区域形成深源极和漏极区域，降低了硅锗的较高介电常数和较低带隙的有害影响。

公开(公告)号：US20120239778A1

公开(公告)日：2012-09-20

申请号：US13477999

申请日：2012-05-22

申请人： Haihong Wang

发明人： Haihong Wang

IPC分类号： G06F15/16

CPC分类号： G06F17/30174 ,  Y10S707/99952

摘要： Data replication includes generating replication data that is part of a replicated file system to be sent over a communication channel to a destination replication device; adding additional verification information to at least a portion of the replication data to prevent data corruption; and sending the replication data and the additional verification information over the communication channel to the destination replication device. The replication data with additional verification information is sent over the communication channel using a reliable protocol that allows the replication data to be verified by the reliable protocol at the destination replication device. The reliable protocol is a protocol capable of detecting most but not all data corruption introduced by the communication channel. The additional verification information includes information for verifying that replication data sent using the reliable protocol does not include data corruption that was introduced by the communication channel and undetected by the reliable protocol.

摘要翻译： 数据复制包括生成作为通过通信通道发送到目标复制设备的复制文件系统的一部分的复制数据; 向至少一部分复制数据添加其他验证信息，以防止数据损坏; 以及通过所述通信信道将所述复制数据和所述附加验证信息发送到所述目的地复制设备。 具有附加验证信息的复制数据通过通信通道使用可靠协议来发送，该协议允许复制数据由目的地复制设备上的可靠协议进行验证。 可靠的协议是能够检测通信信道引入的大多数但不是全部数据损坏的协议。 附加验证信息包括用于验证使用可靠协议发送的复制数据不包括由通信信道引入并且不被可靠协议检测到的数据损坏的信息。

公开(公告)号：US07679134B1

公开(公告)日：2010-03-16

申请号：US10754515

申请日：2004-01-12

申请人： Matthew S. Buynoski ,  Judy Xilin An ,  Haihong Wang ,  Bin Yu

发明人： Matthew S. Buynoski ,  Judy Xilin An ,  Haihong Wang ,  Bin Yu

IPC分类号： H01L29/94

CPC分类号： H01L29/785 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/32139 ,  H01L29/66795

摘要： A semiconductor device includes a group of fin structures. The group of fin structures includes a conductive material and is formed by growing the conductive material in an opening of an oxide layer. The semiconductor device further includes a source region formed at one end of the group of fin structures, a drain region formed at an opposite end of the group of fin structures, and at least one gate.

摘要翻译： 半导体器件包括一组翅片结构。 翅片结构的组包括导电材料，并且通过在氧化物层的开口中生长导电材料而形成。 半导体器件还包括形成在鳍片结构组的一端处的源极区域，形成在鳍片结构组的相对端处的漏极区域和至少一个栅极。

公开(公告)号：US07179692B2

公开(公告)日：2007-02-20

申请号：US10913409

申请日：2004-08-09

申请人： Bin Yu ,  Shibly S. Ahmed ,  Judy Xilin An ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang

发明人： Bin Yu ,  Shibly S. Ahmed ,  Judy Xilin An ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/785 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/66803

摘要： A method of forming a semiconductor device includes forming a fin on an insulating layer, where the fin includes a number of side surfaces, a top surface and a bottom surface. The method also includes forming a gate on the insulating layer, where the gate has a substantially U-shaped cross-section at a channel region of the semiconductor device.

摘要翻译： 形成半导体器件的方法包括在绝缘层上形成翅片，其中鳍片包括多个侧表面，顶表面和底表面。 该方法还包括在绝缘层上形成栅极，其中栅极在半导体器件的沟道区域具有基本上U形的横截面。

公开(公告)号：US07095065B2

公开(公告)日：2006-08-22

申请号：US10633504

申请日：2003-08-05

申请人： Bin Yu ,  Shibly S. Ahmed ,  Haihong Wang

发明人： Bin Yu ,  Shibly S. Ahmed ,  Haihong Wang

IPC分类号： H01L29/80

CPC分类号： H01L29/785 ,  H01L27/1203 ,  H01L29/42392 ,  H01L29/66795

摘要： A semiconductor device may include a substrate and an insulating layer formed on the substrate. A first device may be formed on the insulating layer, including a first fin. The first fin may be formed on the insulating layer and may have a first fin aspect ratio. A second device may be formed on the insulating layer, including a second fin. The second fin may be formed on the insulating layer and may have a second fin aspect ratio different from the first fin aspect ratio.

摘要翻译： 半导体器件可以包括衬底和形成在衬底上的绝缘层。 第一器件可以形成在绝缘层上，包括第一鳍片。 第一翅片可以形成在绝缘层上，并且可以具有第一翅片长宽比。 第二装置可以形成在绝缘层上，包括第二鳍片。 第二翅片可以形成在绝缘层上，并且可以具有与第一翅片长宽比不同的第二翅片长宽比。

公开(公告)号：US06911697B1

公开(公告)日：2005-06-28

申请号：US10632965

申请日：2003-08-04

申请人： Haihong Wang ,  Judy Xilin An ,  Bin Yu

发明人： Haihong Wang ,  Judy Xilin An ,  Bin Yu

IPC分类号： H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L27/01 ,  H01L29/76

CPC分类号： H01L29/785 ,  H01L29/42384 ,  H01L29/66818 ,  H01L29/7855 ,  H01L29/7856 ,  H01L29/78618

摘要： A double-gate semiconductor device includes a substrate, an insulating layer, a fin, source and drain regions and a gate. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The source region is formed on the insulating layer adjacent a first side of the fin and the drain region is formed on the second side of the fin opposite the first side. The source and drain regions have a greater thickness than the fin in the channel region of the semiconductor device.

摘要翻译： 双栅极半导体器件包括衬底，绝缘层，鳍，源极和漏极区以及栅极。 绝缘层形成在基板上，并且鳍形成在绝缘层上。 源极区域形成在与鳍片的第一侧相邻的绝缘层上，并且漏极区域形成在与第一侧相对的翅片的第二侧上。 源极和漏极区域具有比半导体器件的沟道区域中的鳍片更大的厚度。