公开(公告)号：US20150340452A1

公开(公告)日：2015-11-26

申请号：US14817628

申请日：2015-08-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Ryan Ryoung-Han Kim ,  William J. Taylor, JR.

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/785 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method includes forming a raised isolation structure with a recess above a substrate, forming a gate structure above the fin, forming a plurality of spaced-apart buried fin contact structures within the recess that have an outer perimeter surface that contacts at least a portion of an interior perimeter surface of the recess and forming at least one source/drain contact structure for each of the buried fin contact structures. One device includes a plurality of spaced-apart buried fin contact structures positioned within a recess in a raised isolation structure on opposite sides of a gate structure. The upper surface of each of the buried fin contact structures is positioned below an upper surface of the raised isolation structure and an outer perimeter surface of each of the buried fin contact structures contacts at least a portion of an interior perimeter surface of the recess.

Abstract translation: 一种方法包括形成具有在衬底上方的凹陷的凸起的隔离结构，在鳍的上方形成栅极结构，在凹槽内形成多个间隔开的隐埋翅片接触结构，其具有外周表面，该外周表面接触至少部分 凹陷的内周边表面，并形成用于每个埋入鳍接触结构的至少一个源极/漏极接触结构。 一个装置包括位于栅极结构的相对侧上的凸起的隔离结构中的凹部内的多个间隔开的埋入式翅片接触结构。 每个埋入式翅片接触结构的上表面位于凸起隔离结构的上表面的下方，并且每个埋入式翅片接触结构的外周表面与凹部的内周边表面的至少一部分接触。

公开(公告)号：US20150318288A1

公开(公告)日：2015-11-05

申请号：US14267405

申请日：2014-05-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kwan-Yong Lim ,  Ryan Ryoung-Han Kim

IPC: H01L27/11 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L27/1104 ,  H01L29/66666 ,  H01L29/7827

Abstract: Various methods of forming a vertical static random access memory cell and the resulting devices are disclosed. One method includes forming a plurality of pillars of semiconductor material on a substrate, forming first source/drain regions on a lower portion of each of the pillars, forming a gate electrode around each of the pillars above the first source/drain region, forming a second source/drain region on a top portion of each of the pillars above the gate electrode, wherein the first and second source/drain regions and the gate electrode on each pillar defines a vertical transistor, and interconnecting the vertical transistors to define a static random access memory cell.

Abstract translation: 公开了形成垂直静态随机存取存储器单元和所得到的器件的各种方法。 一种方法包括在衬底上形成多个半导体材料柱，在每个柱的下部形成第一源极/漏极区，在第一源极/漏极区之上的每个柱上形成栅电极，形成栅电极 在栅电极上方的每个柱的顶部上的第二源极/漏极区，其中每个柱上的第一和第二源极/漏极区域和栅极电极限定垂直晶体管，并且互连垂直晶体管以限定静态随机 访问存储单元

公开(公告)号：US09153694B2

公开(公告)日：2015-10-06

申请号：US14017781

申请日：2013-09-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Ryan Ryoung-Han Kim ,  William J. Taylor, Jr.

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method includes forming a raised isolation structure with a recess above a substrate, forming a gate structure above the fin, forming a plurality of spaced-apart buried fin contact structures within the recess that have an outer perimeter surface that contacts at least a portion of an interior perimeter surface of the recess and forming at least one source/drain contact structure for each of the buried fin contact structures. One device includes a plurality of spaced-apart buried fin contact structures positioned within a recess in a raised isolation structure on opposite sides of a gate structure. The upper surface of each of the buried fin contact structures is positioned below an upper surface of the raised isolation structure and an outer perimeter surface of each of the buried fin contact structures contacts at least a portion of an interior perimeter surface of the recess.

Abstract translation: 一种方法包括形成具有在衬底上方的凹陷的凸起的隔离结构，在鳍的上方形成栅极结构，在凹槽内形成多个间隔开的隐埋翅片接触结构，其具有外周表面，该外周表面接触至少部分 凹陷的内周边表面，并形成用于每个埋入鳍接触结构的至少一个源极/漏极接触结构。 一个装置包括位于栅极结构的相对侧上的凸起的隔离结构中的凹部内的多个间隔开的埋入式翅片接触结构。 每个埋入式翅片接触结构的上表面位于凸起隔离结构的上表面的下方，并且每个埋入式翅片接触结构的外周表面与凹部的内周边表面的至少一部分接触。

公开(公告)号：US20150255299A1

公开(公告)日：2015-09-10

申请号：US14196931

申请日：2014-03-04

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Jason Richard Cantone ,  Linus Jang ,  Jin Cho ,  Ryan Ryoung-Han Kim

IPC: H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/845

Abstract: Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming fin structures in a selected area of a semiconductor substrate. The method includes covering the fin structures and the semiconductor substrate with a mask and forming a trench in the mask to define no more than two exposed fin structures in the selected area. Further, the method includes removing the exposed fin structures to provide the selected area with a desired number of fin structures.

Abstract translation: 提供了制造集成电路的方法。 在一个实施例中，制造集成电路的方法包括在半导体衬底的选定区域中形成鳍结构。 该方法包括用掩模覆盖翅片结构和半导体衬底，并在掩模中形成沟槽，以在所选择的区域中限定不超过两个暴露的翅片结构。 此外，该方法包括去除暴露的翅片结构以向选定区域提供所需数量的翅片结构。

公开(公告)号：US20150060960A1

公开(公告)日：2015-03-05

申请号：US14017781

申请日：2013-09-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ruilong Xie ,  Ryan Ryoung-Han Kim ,  William J. Taylor, JR.

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method includes forming a raised isolation structure with a recess above a substrate, forming a gate structure above the fin, forming a plurality of spaced-apart buried fin contact structures within the recess that have an outer perimeter surface that contacts at least a portion of an interior perimeter surface of the recess and forming at least one source/drain contact structure for each of the buried fin contact structures. One device includes a plurality of spaced-apart buried fin contact structures positioned within a recess in a raised isolation structure on opposite sides of a gate structure. The upper surface of each of the buried fin contact structures is positioned below an upper surface of the raised isolation structure and an outer perimeter surface of each of the buried fin contact structures contacts at least a portion of an interior perimeter surface of the recess.

Abstract translation: 一种方法包括形成具有在衬底上方的凹陷的凸起的隔离结构，在鳍的上方形成栅极结构，在凹槽内形成多个间隔开的隐埋翅片接触结构，其具有外周表面，该外周表面接触至少部分 凹陷的内周边表面，并形成用于每个埋入鳍接触结构的至少一个源极/漏极接触结构。 一个装置包括位于栅极结构的相对侧上的凸起的隔离结构中的凹部内的多个间隔开的埋入式翅片接触结构。 每个埋入式翅片接触结构的上表面位于凸起隔离结构的上表面的下方，并且每个埋入式翅片接触结构的外周表面与凹部的内周边表面的至少一部分接触。