利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

57 条记录 (耗时 0.028 秒)

    Recessed single crystalline source and drain for semiconductor-on-insulator devices
    31.
    发明授权
    Recessed single crystalline source and drain for semiconductor-on-insulator devices 有权
    用于绝缘体上半导体器件的嵌入式单晶源极和漏极

    公开(公告)号：US08742503B2

    公开(公告)日：2014-06-03

    申请号：US13285162

    申请日：2011-10-31

    申请人： Geng Wang ,  Kangguo Cheng ,  Joseph Ervin ,  Chengwen Pei ,  Ravi M. Todi

    发明人： Geng Wang ,  Kangguo Cheng ,  Joseph Ervin ,  Chengwen Pei ,  Ravi M. Todi

    IPC分类号： H01L27/12

    CPC分类号： H01L29/66477 ,  H01L21/84 ,  H01L27/1203

    摘要： After formation of a gate stack, regions in which a source and a drain are to be formed are recessed through the top semiconductor layer and into an upper portion of a buried single crystalline rare earth oxide layer of a semiconductor-on-insulator (SOI) substrate so that a source trench and drain trench are formed. An embedded single crystalline semiconductor portion epitaxially aligned to the buried single crystalline rare earth oxide layer is formed in each of the source trench and the drain trench to form a recessed source and a recessed drain, respectively. Protrusion of the recessed source and recessed drain above the bottom surface of a gate dielectric can be minimized to reduce parasitic capacitive coupling with a gate electrode, while providing low source resistance and drain resistance through the increased thickness of the recessed source and recessed drain relative to the thickness of the top semiconductor layer.

    摘要翻译： 在形成栅极叠层之后，要形成源极和漏极的区域通过顶部半导体层凹陷，并进入绝缘体上半导体（SOI）的掩埋的单晶稀土氧化物层的上部， 衬底，从而形成源极沟槽和漏极沟槽。 在源极沟槽和漏极沟槽的每一个中分别形成外延对齐于埋入的单晶稀土氧化物层的嵌入式单晶半导体部分，以分别形成凹陷源和凹陷漏极。 可以将栅极电介质的底表面之上的凹陷源和凹陷漏极的突起最小化，以减少与栅极电极的寄生电容耦合，同时通过凹陷源和凹陷漏极的增加的厚度提供低的源极电阻和漏极电阻，相对于 顶部半导体层的厚度。

    MULTILAYER MIM CAPACITOR
    32.
    发明申请
    MULTILAYER MIM CAPACITOR 有权

    公开(公告)号：US20130181326A1

    公开(公告)日：2013-07-18

    申请号：US13352655

    申请日：2012-01-18

    申请人： Kangguo Cheng ,  Joseph Ervin ,  Chengwen Pei ,  Ravi M. Todi ,  Geng Wang

    发明人： Kangguo Cheng ,  Joseph Ervin ,  Chengwen Pei ,  Ravi M. Todi ,  Geng Wang

    IPC分类号： H01L29/92 ,  H01L21/02 ,  B82Y99/00

    CPC分类号： H01L28/40 ,  H01L21/32134 ,  H01L28/86 ,  H01L28/90 ,  H01L28/91

    摘要： An improved semiconductor capacitor and method of fabrication is disclosed. A MIM stack, comprising alternating first-type and second-type metal layers (each separated by dielectric) is formed in a deep cavity. The entire stack can be planarized, and then patterned to expose a first area, and selectively etched to recess all first metal layers within the first area. A second selective etch is performed to recess all second metal layers within a second area. The etched recesses can be backfilled with dielectric. Separate electrodes can be formed; a first electrode formed in said first area and contacting all of said second-type metal layers and none of said first-type metal layers, and a second electrode formed in said second area and contacting all of said first-type metal layers and none of said second-type metal layers.