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43 条记录 (耗时 0.114 秒)

    Added bit signalling in a telecommunications system
    38.
    发明授权
    Added bit signalling in a telecommunications system 失效
    在电信系统中增加了位信令

    公开(公告)号：US5528579A

    公开(公告)日：1996-06-18

    申请号：US75638

    申请日：1993-06-11

    申请人： Mark S. Wadman ,  Adam Opoczynski ,  Mark D. Elpers

    发明人： Mark S. Wadman ,  Adam Opoczynski ,  Mark D. Elpers

    IPC分类号： H04J3/06 ,  H04J3/12 ,  H04J3/14 ,  H04J3/16 ,  H04L7/08

    CPC分类号： H04J3/14 ,  H04J3/0605 ,  H04J3/12 ,  H04J3/1635

    摘要： A telecommunications system includes an added bit signalling method and apparatus for conveying signalling information between a head end and multiple remote ends connected over a passive distribution network. In accordance with the present invention, an added bit having an identifiable data sequence patterned thereon is appended to each channel within a succession of frames. In the system, the modified channels are broken up, routed reconstructed into a modified framing format and transmitted to their respective destination remote units. Because individual channels within a given frame are broken up and reconstructed into modified frames with channels from other frames, the framing information formerly identified by the framing bit is lost. The present invention therefore appends an added-bit sequence to each channel such that each channel sample carries its own multiframe and alignment information. The remote ends monitor the added bits to locate multiframing and alignment information and to identify individual time slots within each frame. The receiving equipment loops the added bit signal back to the transmitting equipment in the upstream data path. The head end monitors the looped back added bit pattern to ensure the integrity of the outgoing and return data paths. The added bit can be further utilized for out-of-band signalling or to provide an additional data link.

    摘要翻译： 一种电信系统包括一个附加的比特信令方法和装置，用于在头端与被动分配网络之间连接的多个远端之间传送信令信息。 根据本发明，在一系列帧内将附加有图案化的可识别数据序列的位附加到每个通道。 在系统中，修改后的信道被分解，路由重建为修改后的成帧格式，并发送到其各自的目标远程单元。 由于给定帧内的各个信道被分解并且被重构为具有来自其他帧的信道的经修改的帧，所以先前由帧位识别的成帧信息丢失。 因此，本发明将附加比特序列附加到每个信道，使得每个信道样本携带其自己的多帧和对准​​信息。 远程监视添加的位以定位多重和对齐信息，并识别每个帧内的各个时隙。 接收设备将添加的比特信号循环回上游数据路径中的发送设备。 头端监视循环添加的位模式，以确保传出和返回数据路径的完整性。 添加的比特可以进一步用于带外信令或提供附加的数据链路。

    Phase locked loop using a counter and a microcontroller to produce VCXO control signals
    39.
    发明授权
    Phase locked loop using a counter and a microcontroller to produce VCXO control signals 失效
    使用计数器和微控制器产生VCXO控制信号的锁相环

    公开(公告)号：US5726607A

    公开(公告)日：1998-03-10

    申请号：US192071

    申请日：1994-02-04

    申请人： Jeffrey Brede ,  Adam Opoczynski ,  James W. Ott

    发明人： Jeffrey Brede ,  Adam Opoczynski ,  James W. Ott

    IPC分类号： H03L7/07 ,  H03L7/091 ,  H03L7/10 ,  H03L7/107 ,  H03L7/14 ,  H04J3/06

    CPC分类号： H03L7/146 ,  H03L7/07 ,  H03L7/091 ,  H03L7/10 ,  H03L7/107 ,  H04J3/0688

    摘要： A digitally controlled phase locked loop generates a derived clock signal that is frequency locked to a reference clock signal. The apparatus is comprised of a microcontroller, counter, digital to analog converter (DAC) and a voltage controlled crystal oscillator (VCXO) connected in a feedback loop arrangement. A frequency output derived from the VCXO periodically samples an incoming reference signal. The sampled count value is compared to an ideal count value associated with the same sampling time period. A microcontroller and software-based algorithm perform the phase comparison and loop filter operations of the phase locked loop (PLL).

    摘要翻译： 数字控制的锁相环产生频率锁定到参考时钟信号的导出时钟信号。 该装置包括以反馈环路布置连接的微控制器，计数器，数模转换器（DAC）和压控晶体振荡器（VCXO）。 从VCXO导出的频率输出周期性地对输入的参考信号进行采样。 将采样的计数值与与相同采样时间段相关联的理想计数值进行比较。 微控制器和基于软件的算法执行锁相环（PLL）的相位比较和环路滤波器操作。

    Point-to-multipoint performance monitoring and failure isolation system
    40.
    发明授权
    Point-to-multipoint performance monitoring and failure isolation system 失效
    点到多点性能监控和故障隔离系统

    公开(公告)号：US5655068A

    公开(公告)日：1997-08-05

    申请号：US588363

    申请日：1996-01-17

    申请人： Adam Opoczynski

    发明人： Adam Opoczynski

    IPC分类号： H04L1/00 ,  H04L1/22 ,  H04L1/24 ,  H04L12/26 ,  G06F11/00

    CPC分类号： H04L43/00 ,  H04L1/22 ,  H04L1/24 ,  H04L12/26 ,  H04L2001/0093

    摘要： A system monitors the performance of a communications network and isolates the location of equipment failures therein through analysis of performance error data. The system passively monitors the performance of the network, operating in the background during normal data and/or voice transmission. The head end generates and inserts multiple error codes, one for each remote unit, into the downstream traffic path. Each remote unit extracts and decodes its respective error code to determine whether a downstream error occurred. Each remote unit then calculates a new error code based on the result of the downstream decode and the respective upstream data message. The head end receives the upstream error codes from all the remote units, decodes them, and accumulates the error data from all remote units over a period of time. An error distribution is generated, and an analysis is performed thereon to isolate the location of error causing equipment failures. The information thus obtained can then be used to initiate facility and equipment protection and/or appropriate maintenance procedures. The invention results in an increased quality of transmission with minimal network down time and minimal impact on overall system performance.

    摘要翻译： 系统监视通信网络的性能，并通过分析性能错误数据来隔离设备故障的位置。 系统被动地监视网络的性能，在正常数据和/或语音传输期间在后台运行。 头端生成并将多个错误代码（每个远程单元一个）插入下游流量路径。 每个远程单元提取并解码其各自的错误代码以确定是否发生下游错误。 然后，每个远程单元基于下游解码的结果和相应的上游数据消息来计算新的错误码。 头端从所有远程单元接收上游错误代码，对其进行解码，并在一段时间内累积来自所有远程单元的错误数据。 生成错误分布，并对其进行分析，以隔离引起设备故障的错误位置。 因此获得的信息可用于启动设备和设备保护和/或适当的维护程序。 本发明导致传输质量提高，网络停机时间最短，对整个系统性能影响最小。