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公开(公告)号:US11227941B2
公开(公告)日:2022-01-18
申请号:US16920324
申请日:2020-07-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shigeki Koya , Atsushi Kurokawa
IPC: H01L21/00 , H01L29/737 , H01L29/06 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/10 , H01L21/306 , H01L29/205
Abstract: A bipolar transistor has a subcollector layer and a stack of collector, base, and emitter layers on the subcollector layer. On the subcollector layer are collector electrodes. On the base layer are base electrodes. The collector layer includes multiple doped layers with graded impurity concentrations, higher on the subcollector layer side and lower on the base layer side. Of these doped layers, the one having the highest impurity concentration is in contact with the subcollector layer and has a sheet resistance less than or equal to about nine times that of the subcollector layer.
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公开(公告)号:US11227804B2
公开(公告)日:2022-01-18
申请号:US16869275
申请日:2020-05-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shigeki Koya , Isao Obu , Kaoru Ideno
IPC: H01L29/737 , H01L21/8252 , H01L29/66 , H01L29/15
Abstract: A collector layer, a base layer, an emitter layer, and an emitter mesa layer are placed above a substrate in this order. A base electrode and an emitter electrode are further placed above the substrate. The emitter mesa layer has a long shape in a first direction in plan view. The base electrode includes a base electrode pad portion spaced from the emitter mesa layer in the first direction. An emitter wiring line and a base wiring line are placed on the emitter electrode and the base electrode, respectively. The emitter wiring line is connected to the emitter electrode via an emitter contact hole. In the first direction, the spacing between the edges of the emitter mesa layer and the emitter contact hole on the side of the base wiring line is smaller than that between the emitter mesa layer and the base wiring line.
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公开(公告)号:US11196394B2
公开(公告)日:2021-12-07
申请号:US16527578
申请日:2019-07-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shigeki Koya , Yasunari Umemoto , Yuichi Saito , Isao Obu , Takayuki Tsutsui
IPC: H03F3/21 , H03F3/45 , H03F1/02 , H01L23/00 , H01F17/00 , H01L23/552 , H03F3/213 , H01L23/66 , H01L23/498
Abstract: A power amplifier module includes a first substrate and a second substrate, at least part of the second substrate being disposed in a region overlapping the first substrate. The second substrate includes a first amplifier circuit and a second amplifier circuit. The first substrate includes a first transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; a second transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; and multiple first conductors disposed in a row between the first transformer and the second transformer, each of the multiple first conductors extending from the wiring layer on a first main surface to the wiring layer on a second main surface of the substrate.
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公开(公告)号:US11164963B2
公开(公告)日:2021-11-02
申请号:US16854262
申请日:2020-04-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Isao Obu , Yasunari Umemoto , Masahiro Shibata , Shigeki Koya , Masao Kondo , Takayuki Tsutsui
IPC: H01L29/737 , H03F3/21 , H03F1/56 , H03F3/24 , H01L29/08 , H01L23/00 , H01L29/10 , H01L29/417 , H01L29/423 , H01L21/306 , H01L21/02 , H01L21/311 , H01L21/308 , H01L29/66 , H03F3/213 , H03F3/195 , H01L29/205 , H01L29/45 , H03F1/30 , H01L27/102 , H01L21/285
Abstract: A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.
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公开(公告)号:US11107909B2
公开(公告)日:2021-08-31
申请号:US16436674
申请日:2019-06-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Isao Obu , Kaoru Ideno , Shigeki Koya
IPC: H01L29/737 , H01L29/423 , H01L29/417 , H01L29/08 , H01L29/06
Abstract: A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface.
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公开(公告)号:US10855232B2
公开(公告)日:2020-12-01
申请号:US16190861
申请日:2018-11-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shigeki Koya , Takayuki Tsutsui , Yasunari Umemoto , Isao Obu , Satoshi Tanaka
Abstract: A power amplifier module includes a first amplifier circuit that amplifies a radio frequency signal with a first gain corresponding to a first control signal to generate a first amplified signal; a second amplifier circuit that amplifies the first amplified signal with a second gain corresponding to a second control signal to generate a second amplified signal; and a control unit that generates the first control signal and the second control signal. The second control signal is a control signal for increasing a power-supply voltage for the second amplifier circuit as a peak-to-average power ratio of the radio frequency signal increases. The first control signal is a control signal for controlling the first gain of the first amplifier circuit so that a variation in the second gain involved in a variation in the power-supply voltage for the second amplifier circuit is compensated for.
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公开(公告)号:US20190158039A1
公开(公告)日:2019-05-23
申请号:US16190861
申请日:2018-11-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shigeki Koya , Takayuki Tsutsui , Yasunari Umemoto , Isao Obu , Satoshi Tanaka
Abstract: A power amplifier module includes a first amplifier circuit that amplifies a radio frequency signal with a first gain corresponding to a first control signal to generate a first amplified signal; a second amplifier circuit that amplifies the first amplified signal with a second gain corresponding to a second control signal to generate a second amplified signal; and a control unit that generates the first control signal and the second control signal. The second control signal is a control signal for increasing a power-supply voltage for the second amplifier circuit as a peak-to-average power ratio of the radio frequency signal increases. The first control signal is a control signal for controlling the first gain of the first amplifier circuit so that a variation in the second gain involved in a variation in the power-supply voltage for the second amplifier circuit is compensated for.
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公开(公告)号:US10297680B2
公开(公告)日:2019-05-21
申请号:US15957702
申请日:2018-04-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shigeki Koya , Atsushi Kurokawa
IPC: H01L21/00 , H01L29/737 , H01L29/06 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/10 , H01L21/306 , H01L29/205
Abstract: A bipolar transistor has a subcollector layer and a stack of collector, base, and emitter layers on the subcollector layer. On the subcollector layer are collector electrodes. On the base layer are base electrodes. The collector layer includes multiple doped layers with graded impurity concentrations, higher on the subcollector layer side and lower on the base layer side. Of these doped layers, the one having the highest impurity concentration is in contact with the subcollector layer and has a sheet resistance less than or equal to about nine times that of the subcollector layer.
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公开(公告)号:US09014654B2
公开(公告)日:2015-04-21
申请号:US14055104
申请日:2013-10-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tsutomu Kobori , Shigeki Koya , Akishige Nakajima , Yasushi Shigeno
Abstract: A semiconductor apparatus includes multiple field effect transistors provided between an antenna terminal to be connected to an antenna and multiple external terminals through which RF signals are capable of being supplied and a voltage generating circuit. When the field effect transistors provided between one of the multiple external terminals and the antenna terminal are turned off, the voltage generating unit charges a capacitor via a resistor circuit by switching the polarity of the RF signal to be supplied to the other external terminal with respect to the control signal and outputs a voltage based on a sum of the charge voltage and the voltage of the control signal as the gate drive voltage. The resistor circuit includes a first resistor including positive temperature characteristics and a second resistor including negative temperature characteristics.
Abstract translation: 半导体装置包括设置在要连接到天线的天线端子与能够提供RF信号的多个外部端子之间的多个场效应晶体管和电压产生电路。 当设置在多个外部端子中的一个外部端子和天线端子之间的场效应晶体管截止时,电压产生单元通过电阻电路对电容器充电,通过将要提供给另一个外部端子的RF信号的极性相对于 并输出基于充电电压和控制信号的电压之和的电压作为栅极驱动电压。 电阻电路包括具有正温度特性的第一电阻器和包括负温度特性的第二电阻器。
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公开(公告)号:US20140328223A1
公开(公告)日:2014-11-06
申请号:US14361448
申请日:2012-11-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Eigo Tange , Shigeki Koya , Yasushi Shigeno , Akishige Nakajima
CPC classification number: H04B1/525 , H04B1/0064 , H04B1/44 , H04B15/04
Abstract: Reduction of intermodulation distortion in a high-frequency switch is achieved. A semiconductor device (1) includes an antenna terminal (ANT_LB), plural external terminals (RX_LB, TX_LB, TRX_LB, TERM_LB), plural first high-frequency switches (101 to 104), and plural control terminals. Each first high-frequency switch includes plural first field-effect transistors, plural first resistors (Rg—1 to Rg—6) connected to the gate terminals of the first field-effect transistors, and a second resistor (Rc) disposed between the corresponding control terminal and the first resistors. The second resistor in the first high-frequency switch disposed between the first terminal supplied with an RF transmission signal and an RF reception signal of a frequency division duplex system and the antenna terminal is configured so that linearity of current-voltage characteristics thereof is higher than linearity of current-voltage characteristics of the first resistor.
Abstract translation: 实现了降低高频开关中的互调失真。 半导体装置(1)包括天线端子(ANT_LB),多个外部端子(RX_LB,TX_LB,TRX_LB,TERM_LB),多个第一高频开关(101〜104)和多个控制端子。 每个第一高频开关包括多个第一场效应晶体管,连接到第一场效应晶体管的栅极端的多个第一电阻器(Rg-1至Rg-6)和设置在相应的第一场效应晶体管之间的第二电阻器(Rc) 控制端子和第一个电阻。 布置在提供有RF传输信号的第一端子与频分双工系统的RF接收信号之间的第一高频开关中的第二电阻器和天线端子被配置为使得电流 - 电压特性的线性度高于 第一电阻器的电流 - 电压特性的线性度。
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