Thermally enhanced electronic packages for GaN power integrated circuits

    公开(公告)号:US11145579B1

    公开(公告)日:2021-10-12

    申请号:US17169304

    申请日:2021-02-05

    Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.

    ACTIVE BRIDGE RECTIFIER
    32.
    发明申请

    公开(公告)号:US20210281189A1

    公开(公告)日:2021-09-09

    申请号:US17191451

    申请日:2021-03-03

    Abstract: A circuit is disclosed. The circuit includes first, second third and fourth diodes connected to form a bridge rectification circuit having a pair of input terminals to receive an AC input signal and a pair of output terminals to deliver a rectified DC signal. The circuit also includes a first semiconductor switch coupled in parallel with the first diode, a second semiconductor switch coupled in parallel with the second diode, and a switch control circuit coupled to the pair of input terminals and arranged to selectively operate the first and second semiconductor switches using power from the AC input signal at the pair of input terminals.

    Transistor DV/DT control circuit
    33.
    发明授权

    公开(公告)号:US11855635B2

    公开(公告)日:2023-12-26

    申请号:US17853740

    申请日:2022-06-29

    CPC classification number: H03K3/012

    Abstract: Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.

    Integrated gallium nitride power device with protection circuits

    公开(公告)号:US11791709B2

    公开(公告)日:2023-10-17

    申请号:US17853749

    申请日:2022-06-29

    CPC classification number: H02M1/08 H02M1/32 H02M3/155 H02M3/158 H03K3/012 H02H9/02

    Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

    CIRCUITS AND METHODS FOR CONTROLLING A VOLTAGE OF A SEMICONDUCTOR SUBSTRATE

    公开(公告)号:US20230112152A1

    公开(公告)日:2023-04-13

    申请号:US18064185

    申请日:2022-12-09

    Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

    INTEGRATED POWER DEVICE WITH ENERGY HARVESTING GATE DRIVER

    公开(公告)号:US20230006539A1

    公开(公告)日:2023-01-05

    申请号:US17853746

    申请日:2022-06-29

    Abstract: An electronic circuit is disclosed. The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, and a gate driver circuit including a pull-down transistor coupled to the gate terminal, and an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal, where the gate driver circuit is arranged to store energy harvested from the input signal and use the stored energy to change a conductive state of the pull-down transistor. In one aspect, the transistor includes gallium nitride (GaN). In another aspect, the pull-down transistor includes GaN.

    CIRCUITS AND METHODS FOR CONTROLLING A VOLTAGE OF A SEMICONDUCTOR SUBSTRATE

    公开(公告)号:US20220416777A1

    公开(公告)日:2022-12-29

    申请号:US17850792

    申请日:2022-06-27

    Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

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