SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20250113716A1

    公开(公告)日:2025-04-03

    申请号:US18728173

    申请日:2023-01-11

    Abstract: A semiconductor device including a miniaturized transistor is provided. The semiconductor device includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is provided over the first insulating layer and includes a second opening in a region overlapping with the first opening. The semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second insulating layer is provided over the semiconductor layer. The third conductive layer is provided over the second insulating layer. The first insulating layer has a stacked-layer structure of a third insulating layer and a fourth insulating layer over the third insulating layer. The fourth insulating layer includes a region having a higher film density than the third insulating layer.

    Semiconductor Device And Manufacturing Method Of The Semiconductor Device

    公开(公告)号:US20230320135A1

    公开(公告)日:2023-10-05

    申请号:US18127198

    申请日:2023-03-28

    CPC classification number: H10K59/1213 H10K59/1201

    Abstract: Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween. The second semiconductor layer is positioned over the first insulating layer and in contact with side and top surfaces of a side end portion of the fourth conductive layer and side and top surfaces of a side end portion of the fifth conductive layer; the side end portions face each other. The sixth conductive layer is positioned over the second semiconductor layer with the third insulating layer positioned therebetween. The first transistor is electrically connected to the second transistor.

    PEELING METHOD AND MANUFACTURING METHOD OF FLEXIBLE DEVICE

    公开(公告)号:US20220216243A1

    公开(公告)日:2022-07-07

    申请号:US17701961

    申请日:2022-03-23

    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 μm and less than or equal to 3 μm is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.

    Display Device and Electronic Device Including the Display Device

    公开(公告)号:US20220187645A1

    公开(公告)日:2022-06-16

    申请号:US17562070

    申请日:2021-12-27

    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20180182870A1

    公开(公告)日:2018-06-28

    申请号:US15846657

    申请日:2017-12-19

    Abstract: To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high productivity. To reduce the temperatures in a manufacturing process of a semiconductor device. An island-like oxide semiconductor layer is formed over a first insulating film; a second insulating film and a first conductive film are formed in this order, covering the oxide semiconductor layer; oxygen is supplied to the second insulating film through the first conductive film; a metal oxide film is formed over the second insulating film in an atmosphere containing oxygen; a first gate electrode is formed by processing the metal oxide film; a third insulating film is formed, covering the first gate electrode and the second insulating film; and first heat treatment is performed. The second insulating film and the third insulating film each include oxide. The highest temperature in the above steps is 340° C. or lower.

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