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    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
    2.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240038777A1

    公开(公告)日：2024-02-01

    申请号：US18224383

    申请日：2023-07-20

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Masakatsu OHNO ,  Masataka NAKADA ,  Yukinori SHIMA ,  Masayoshi DOBASHI ,  Junichi KOEZUKA ,  Masami JINTYOU

    IPC: H01L27/12

    CPC classification number: H01L27/124 ,  H01L27/1259 ,  H01L2933/0066 ,  H01L33/62

    Abstract: To provide a semiconductor device that occupies a small area. The semiconductor device includes a first conductive layer, first to fifth insulating layers, and a second conductive layer that are stacked in this order and further includes a semiconductor layer, a third conductive layer, and a sixth insulating layer. The semiconductor layer is in contact with the top surface of the first conductive layer, the side surfaces of the first to fifth insulating layers, and the second conductive layer. The sixth insulating layer is over the semiconductor layer. The third conductive layer is over the sixth insulating layer and overlaps with the semiconductor layer with the sixth insulating layer between the third conductive layer and the semiconductor layer. The first insulating layer includes a region having a higher hydrogen content than the second insulating layer. The fifth insulating layer includes a region having a higher hydrogen content than the fourth insulating layer. The third insulating layer contains oxygen.

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210399140A1

    公开(公告)日：2021-12-23

    申请号：US17279153

    申请日：2019-09-27

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Rai SATO ,  Masami JINTYOU ,  Masayoshi DOBASHI ,  Takashi SHIRAISHI ,  Satoru SAITO ,  Yasutaka NAKAZAWA

    IPC: H01L29/786 ,  H01L29/423 ,  H01L29/66

    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a metal oxide layer, and a conductive layer; the first insulating layer, the metal oxide layer, and the conductive layer are stacked in this order over the semiconductor layer; an end portion of the first insulating layer is located inward from an end portion of the semiconductor layer; an end portion of the metal oxide layer is located inward from the end portion of the first insulating layer; and an end portion of the conductive layer is located inward from the end portion of the metal oxide layer. The second insulating layer is preferably provided to cover the semiconductor layer, the first insulating layer, the metal oxide layer, and the conductive layer. It is preferable that the semiconductor layer include a first region, a pair of second regions, and a pair of third regions; the first region overlap with the first insulating layer and the metal oxide layer; the second regions between which the first region is sandwiched overlap with the first insulating layer and not overlap with the metal oxide layer; the third regions between which the first region and the pair of second regions are sandwiched not overlap with the first insulating layer; and the third regions be in contact with the second insulating layer.

    Semiconductor Device And Manufacturing Method Of The Semiconductor Device
    4.
    发明公开
    Semiconductor Device And Manufacturing Method Of The Semiconductor Device 审中-公开

    公开(公告)号：US20230320135A1

    公开(公告)日：2023-10-05

    申请号：US18127198

    申请日：2023-03-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yasuharu HOSAKA ,  Masami JINTYOU ,  Takahiro IGUCHI ,  Chieko MISAMA ,  Ami SATO ,  Masayoshi DOBASHI

    IPC: H10K59/121 ,  H10K59/12

    CPC classification number: H10K59/1213 ,  H10K59/1201

    Abstract: Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween. The second semiconductor layer is positioned over the first insulating layer and in contact with side and top surfaces of a side end portion of the fourth conductive layer and side and top surfaces of a side end portion of the fifth conductive layer; the side end portions face each other. The sixth conductive layer is positioned over the second semiconductor layer with the third insulating layer positioned therebetween. The first transistor is electrically connected to the second transistor.

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210126132A1

    公开(公告)日：2021-04-29

    申请号：US17257364

    申请日：2019-06-26

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Rai SATO ,  Masami JINTYOU ,  Masayoshi DOBASHI ,  Takashi SHIRAISHI

    IPC: H01L29/786 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/66

    Abstract: A transistor in which shape defects are unlikely to occur is provided. A transistor with favorable electrical characteristics is provided. A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a transistor. The transistor includes a semiconductor layer, a first insulating layer, a metal oxide layer, a functional layer, and a conductive layer. The first insulating layer is positioned over the semiconductor layer. The metal oxide layer is positioned over the first insulating layer. The functional layer is positioned over the metal oxide layer. The conductive layer is positioned over the functional layer. The semiconductor layer, the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer have regions overlapping with each other. In the channel length direction of the transistor, end portions of the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer are positioned inward from an end portion of the semiconductor layer. An etching rate of the functional layer with an etchant containing one or more of phosphoric acid, acetic acid, nitric acid, hydrochloric acid, and sulfuric acid is lower than an etching rate of the conductive layer.

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    6.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190288092A1

    公开(公告)日：2019-09-19

    申请号：US16344177

    申请日：2017-10-25

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Masahiro KATAYAMA ,  Masayoshi DOBASHI ,  Masataka NAKADA

    IPC: H01L29/66 ,  H01L29/786

    Abstract: A semiconductor device is manufactured with high mass productivity at low cost. Yield in a manufacturing process of the semiconductor device is improved. An island-shaped metal oxide layer is formed over a substrate, a resin layer is formed over the metal oxide layer to cover an end portion of the metal oxide layer, and the metal oxide layer and the resin layer are separated by light irradiation. After forming the resin layer and before the light irradiation, an insulating layer is formed over the resin layer. For example, the resin layer is formed in an island shape and the insulating layer is formed to cover an end portion of the resin layer. In the case where an adhesive layer is formed over the resin layer, the adhesive layer is preferably formed to be located inward from the end portion of the metal oxide layer.

    DISPLAY APPARATUS
    7.
    发明申请
    DISPLAY APPARATUS 有权

    公开(公告)号：US20250008780A1

    公开(公告)日：2025-01-02

    申请号：US18707700

    申请日：2022-11-17

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Masataka NAKADA ,  Masahiro KATAYAMA ,  Rai SATO ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Masayoshi DOBASHI ,  Koji KUSUNOKI ,  Tomonori NAKAYAMA

    IPC: H10K59/122 ,  H10K59/131

    Abstract: A display apparatus with high resolution is provided. The display apparatus includes a transistor, a light-emitting device, a first insulating layer, a second insulating layer, and a first conductive layer. The transistor includes a semiconductor layer and a second conductive layer electrically connected to the semiconductor layer. The light-emitting device includes a pixel electrode. The first insulating layer is provided over the transistor and includes a first opening reaching the second conductive layer. The first conductive layer covers the first opening. The second insulating layer is provided over the first insulating layer and includes a second opening in a region overlapping with the first opening. The pixel electrode covers a top surface of the second insulating layer and the second opening. The pixel electrode is electrically connected to the second conductive layer through the first conductive layer. An end portion of the first insulating layer is positioned over the second conductive layer. An end portion of the second insulating layer is positioned over the first conductive layer. An end portion of the second insulating layer is positioned outward from the end portion of the first insulating layer.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20240421208A1

    公开(公告)日：2024-12-19

    申请号：US18738930

    申请日：2024-06-10

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Masami JINTYOU ,  Masayoshi DOBASHI ,  Junichi KOEZUKA

    IPC: H01L29/49 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

    Abstract: A transistor that can be miniaturized and highly reliable is provided. A semiconductor device includes a transistor and a first insulating layer. The transistor includes first to third conductive layers, a semiconductor layer, and a second insulating layer. The first insulating layer includes a first layer and a second layer over the first layer. The first insulating layer is over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is over the second layer. The semiconductor layer is in contact with the first and second conductive layers and with a side surface of the first layer inside the first opening. The second insulating layer covers the semiconductor layer in the first opening, and the third conductive layer covers the second insulating layer in the first opening. The first insulating layer includes a second opening at a position different from the first opening. The second insulating layer is in contact with the first layer inside the second opening. The first layer includes an oxide insulating film, and the second layer includes an insulating film having an oxygen barrier property.

    SEMICONDUCTOR DEVICE AND DISPLAY DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20200373430A1

    公开(公告)日：2020-11-26

    申请号：US16635295

    申请日：2018-08-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yukinori SHIMA ,  Masataka NAKADA ,  Masayoshi DOBASHI ,  Kenichi OKAZAKI

    IPC: H01L29/786 ,  G02F1/1368 ,  G02F1/1345

    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a first conductive layer, and a second conductive layer. The second semiconductor layer is positioned over the first semiconductor layer, the second conductive layer is positioned on the second semiconductor layer, and the second insulating layer is provided so as to cover a top surface and a side surface of the second conductive layer. The second conductive layer and the second insulating layer include a first opening, and the third semiconductor layer is provided in contact with a top surface of the second insulating layer, a side surface of the first opening, and the second semiconductor layer. The first insulating layer is positioned between the first conductive layer and the third semiconductor layer, the third insulating layer is positioned between the first insulating layer and the first conductive layer, and the fourth insulating layer is provided so as to surround the first conductive layer.

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