公开(公告)号：US20220068859A1

公开(公告)日：2022-03-03

申请号：US17207242

申请日：2021-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungeun Choi ,  Eun-Ji Kim ,  Jong-Ho Moon ,  Hyoungyol Mun ,  Han-Sik Yoo ,  Kiseok Lee ,  Seungjae Jung ,  Taehyun An ,  Sangyeon Han ,  Yoosang Hwang

IPC: H01L23/00 ,  H01L27/108 ,  G11C11/408 ,  G11C11/4091 ,  H01L25/065 ,  H01L25/18

Abstract: A three-dimensional semiconductor memory device is provided. The device may include a first substrate including a bit-line connection region and a word-line connection region, a cell array structure on the first substrate, a second substrate including a first core region and a second core region, which are respectively overlapped with the bit-line connection region and the word-line connection region, and a peripheral circuit structure on the second substrate.

公开(公告)号：US11101283B2

公开(公告)日：2021-08-24

申请号：US16508839

申请日：2019-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hui-Jung Kim ,  Kiseok Lee ,  Keunnam Kim ,  Yoosang Hwang

IPC: H01L27/11578 ,  H01L27/11573 ,  H01L27/1157

Abstract: A semiconductor device may include a stack structure that includes a plurality of layers vertically stacked on a substrate, and a plurality of gate electrodes that vertically extend to penetrate the stack structure. Each of the plurality of layers may include a plurality of semiconductor patterns that extend in parallel along a first direction, a bit line that is electrically connected to the semiconductor patterns and extends in a second direction intersecting the first direction, a first air gap on the bit line, and a data storage element that is electrically connected to a corresponding one of the semiconductor patterns. The first air gap is interposed between the bit line of a first layer of the plurality of layers and the bit line of a second layer of the plurality of layers.

公开(公告)号：US10943782B2

公开(公告)日：2021-03-09

申请号：US16460468

申请日：2019-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hui-jung Kim ,  Kiseok Lee ,  Keunnam Kim ,  Yoosang Hwang

IPC: H01L21/02 ,  H01L27/24 ,  H01L27/108 ,  H01L27/22 ,  H01L21/306

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The method comprises alternately stacking a plurality of dielectric layers and a plurality of first semiconductor layers to form a mold structure on a substrate, forming a hole penetrating the mold structure, forming on the substrate a second semiconductor layer filling the hole, and irradiating a laser onto the second semiconductor layer.

公开(公告)号：US10910363B2

公开(公告)日：2021-02-02

申请号：US16288590

申请日：2019-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiseok Lee ,  Chan-Sic Yoon ,  Dongoh Kim ,  Myeong-Dong Lee

IPC: H01L21/70 ,  H01L27/06 ,  H01L21/8238 ,  H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L29/49 ,  H01L27/24 ,  H01L27/108 ,  H01L27/22

Abstract: Disclosed is a semiconductor device comprising a substrate including a first region and a second region, a first gate pattern on the substrate of the first region, and a second gate pattern on the substrate of the second region. The first gate pattern comprises a first high-k dielectric pattern, a first N-type metal-containing pattern, and a first P-type metal-containing pattern that are sequentially stacked. The second gate pattern comprises a second high-k dielectric pattern and a second P-type metal-containing pattern that are sequentially stacked.

公开(公告)号：US10748910B2

公开(公告)日：2020-08-18

申请号：US16053315

申请日：2018-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chan-Sic Yoon ,  Dongoh Kim ,  Kiseok Lee ,  Sunghak Cho ,  Jemin Park

IPC: H01L27/108 ,  H01L21/762 ,  H01L21/311

Abstract: A semiconductor device includes a substrate that includes a cell region and a peripheral circuit region, a cell insulating pattern disposed in the cell region of the substrate that defines a cell active region, and a peripheral insulating pattern disposed in the peripheral circuit region of the substrate that defines a peripheral active region. The peripheral insulating pattern includes a first peripheral insulating pattern having a first width and a second peripheral insulating pattern having a second width greater than the first width. A topmost surface of at least one of the first peripheral insulating pattern and the second peripheral insulating pattern is positioned higher than a topmost surface of the cell insulating pattern.

公开(公告)号：US20190206869A1

公开(公告)日：2019-07-04

申请号：US16115693

申请日：2018-08-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hui-Jung Kim ,  Kiseok Lee ,  Junsoo Kim ,  Sunghee Han ,  Bong-Soo Kim ,  Yoosang Hwang

IPC: H01L27/108 ,  H01L29/10 ,  H01L23/528 ,  H01L29/08 ,  H01L29/45 ,  H01L29/78

Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes a substrate and a stack including a plurality of layers on the substrate. Each of the plurality of layers includes semiconductor patterns and a first conductive line that is connected to at least one of the semiconductor patterns. A second conductive line and a third conductive line penetrate the stack. The semiconductor patterns include a first semiconductor pattern and a second semiconductor pattern that are adjacent and spaced apart from each other in a first layer among the plurality of layers. The third conductive line is between, and connected in common to, the first and second semiconductor patterns.

公开(公告)号：US20160328714A1

公开(公告)日：2016-11-10

申请号：US15150202

申请日：2016-05-09

Applicant: Samsung Electronics Co., Ltd

Inventor： Kiseok Lee ,  Daekyu Choi ,  Jaeweon Cho

IPC: G06Q20/40 ,  G06Q20/34 ,  H04W4/00

CPC classification number: G06Q20/4014 ,  G06Q20/34 ,  G06Q20/409 ,  H04W4/70

Abstract: The present disclosure relates to a sensor network, machine type communication (MTC), machine-to-machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services on the basis of the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method for authenticating payment related information of an authentication server in a mobile communication system is provided, which includes receiving first authentication information including a terminal identifier and beacon receiver related information from a beacon receiver, receiving second authentication information including subscriber identification information that is mapped onto a user's payment means and payment terminal related information from a payment server in accordance with a user's payment request, and authenticating payment related information through comparison of the first authentication information with the second authentication information.

Abstract translation: 本公开涉及传感器网络，机器类型通信（MTC），机器对机器（M2M）通信和物联网技术（IoT）。 智能家居，智能建筑，智能城市，智能汽车，连接车，医疗保健，数字教育，智能零售，安全和安全服务等上述技术，可以将本发明应用于智能服务。 提供了一种用于在移动通信系统中验证认证服务器的支付相关信息的方法，其包括从信标接收机接收包括终端标识符和信标接收器相关信息的第一认证信息，接收包括映射的订户识别信息的第二认证信息 根据用户的支付请求从支付服务器接收用户的付款方式和支付终端相关信息，以及通过比较第一认证信息与第二认证信息来认证支付相关信息。

公开(公告)号：US12300730B2

公开(公告)日：2025-05-13

申请号：US18668743

申请日：2024-05-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoin Lee ,  Kiseok Lee

IPC: H01L29/423 ,  H01L29/40

Abstract: A semiconductor device includes lower electrodes, a first supporter structure including first supporter patterns interconnecting the lower electrodes, wherein side surfaces of the first supporter patterns and side surfaces of the lower electrodes that are exposed by the first supporter patterns at least partially define a first open region, the first supporter patterns being spaced apart from one another, the first open region extending among the first supporter patterns in a horizontal direction, a dielectric layer covering the first supporter structure and the lower electrodes, and an upper electrode on the dielectric layer. A distance between adjacent ones of the first supporter patterns is smaller than or equal to a pitch of the lower electrodes.

公开(公告)号：US20250133728A1

公开(公告)日：2025-04-24

申请号：US18825982

申请日：2024-09-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Iljae Shin ,  Jinwoo Han ,  Seokhan Park ,  Sungmin Park ,  Gyuhwan Oh ,  Kiseok Lee

IPC: H10B12/00 ,  H01L29/45

Abstract: A semiconductor device includes a bit line, a channel, a word line and a capacitor. The bit line is disposed on a substrate, and extends in a first direction substantially perpendicular to an upper surface of the substrate. The channel at least partially surrounds a sidewall of the bit line. The word line is disposed on the substrate, and at least a portion of the word line overlaps the channel in a horizontal direction substantially parallel to the upper surface of the substrate. The capacitor is electrically connected to the channel, and at least a portion of the capacitor overlaps the channel and the word line in the horizontal direction.

公开(公告)号：US20250081448A1

公开(公告)日：2025-03-06

申请号：US18672227

申请日：2024-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmuk Kim ,  Kiseok Lee ,  Keunnam Kim ,  Hongjun Lee

IPC: H10B12/00

Abstract: A semiconductor device includes a first gate structure in a cell region of a substrate, where the substrate includes a peripheral circuit region, a bit line structure on the cell region of the substrate, a cell capacitor structure on the bit line structure, a decoupling capacitor structure on the peripheral circuit region of the substrate, and a second gate structure on the decoupling capacitor structure.