公开(公告)号：US20070247904A1

公开(公告)日：2007-10-25

申请号：US11766980

申请日：2007-06-22

申请人： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

发明人： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

IPC分类号： G11C16/04

CPC分类号： H01L29/7887 ,  B82Y10/00 ,  G03G5/00 ,  G03G5/02 ,  G03G5/04 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082 ,  G03G5/08214 ,  G11C11/56 ,  G11C13/02 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  G11C2216/08 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/7881 ,  Y10S977/774 ,  Y10S977/785 ,  Y10S977/936

摘要： Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

摘要翻译： 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上，在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上，金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中，公开了一种用于对该器件进行充电和/或放电的方法，该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子，并随后从一个或多个点或分子的每个离散能级一次去除单个电子。

公开(公告)号：US20050202615A1

公开(公告)日：2005-09-15

申请号：US10796413

申请日：2004-03-10

申请人： Xiangfeng Duan ,  Chunming Niu ,  David Stumbo ,  Calvin Chow

发明人： Xiangfeng Duan ,  Chunming Niu ,  David Stumbo ,  Calvin Chow

IPC分类号： H01L21/8234

CPC分类号： G11C16/0408 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7887

摘要： Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A thin film of nanoelements is formed on the substrate above a channel region. A gate contact is formed on the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device, nanoelements are present having a plurality of charge injection voltages, to provide multiple states. In another aspect, a printing device includes a charge diffusion layer that includes a matrix containing a plurality of nanoelements configured to be anisotropically electrically conductive through the charge diffusion layer to transfer charge to areas of the first surface with reduced lateral charge spread.

摘要翻译： 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 在通道区域上方的衬底上形成纳米元素的薄膜。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在多状态存储器件中，纳米元件具有多个电荷注入电压，以提供多种状态。 另一方面，印刷装置包括电荷扩散层，该电荷扩散层包括通过电荷扩散层构成为各向异性导电的多个纳米元素的基体，以将电荷转移到具有减小的横向电荷扩展的第一表面的区域。

公开(公告)号：US20050201149A1

公开(公告)日：2005-09-15

申请号：US11018572

申请日：2004-12-21

申请人： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

发明人： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

IPC分类号： G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/788

CPC分类号： G11C11/56 ,  B82Y10/00 ,  G03G5/00 ,  G03G5/02 ,  G03G5/04 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082 ,  G03G5/08214 ,  G11C13/02 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  G11C2216/08 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/7887 ,  Y10S977/936 ,  Y10S977/943

摘要： Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

摘要翻译： 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上，在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上，金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中，公开了一种用于对该器件进行充电和/或放电的方法，该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子，并随后从一个或多个点或分子的每个离散能级一次去除单个电子。

公开(公告)号：US07667296B2

公开(公告)日：2010-02-23

申请号：US11525121

申请日：2006-09-22

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire capacitor and methods of making the same are disclosed. The nanowire capacitor includes a subrate and a semiconductor nanowire that is supported by the substrate. An insulator is formed on a portion of the surface of the nanowire. Additionally, an outer coaxial conductor is formed on a portion insulator and a contact coupled to the nanowire.

摘要翻译： 公开了一种纳米线电容器及其制造方法。 纳米线电容器包括由衬底和由衬底支撑的半导体纳米线。 绝缘体形成在纳米线表面的一部分上。 此外，外部同轴导体形成在部分绝缘体上和与纳米线耦合的触点。

公开(公告)号：US20050212079A1

公开(公告)日：2005-09-29

申请号：US10806361

申请日：2004-03-23

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/06 ,  H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire varactor diode and methods of making the same are disclosed. The structure comprises a coaxial capacitor running the length of the semiconductor nanowire. In one embodiment, a semiconductor nanowire of a first conductivity type is deposited on a substrate. An insulator is formed on at least a portion of the nanowire's surface. A region of the nanowire is doped with a second conductivity type material. A first electrical contact is formed on at least part of the insulator and the doped region. A second electrical contact is formed on a non-doped potion of the nanowire. During operation, the conductivity type at the surface of the nanowire inverts and a depletion region is formed upon application of a voltage to the first and second electrical contacts. The varactor diode thereby exhibits variable capacitance as a function of the applied voltage.

摘要翻译： 公开了一种纳米线变容二极管及其制造方法。 该结构包括运行半导体纳米线长度的同轴电容器。 在一个实施例中，第一导电类型的半导体纳米线沉积在衬底上。 在纳米线表面的至少一部分上形成绝缘体。 纳米线的区域掺杂有第二导电类型的材料。 在绝缘体和掺杂区域的至少一部分上形成第一电接触。 在纳米线的非掺杂药液上形成第二电接触。 在操作期间，纳米线表面的导电类型反转，并且在向第一和第二电触点施加电压时形成耗尽区。 因此，变容二极管作为施加电压的函数呈现可变电容。

公开(公告)号：US06521903B1

公开(公告)日：2003-02-18

申请号：US09348481

申请日：1999-07-07

申请人： James Rockrohr ,  David Stumbo

发明人： James Rockrohr ,  David Stumbo

IPC分类号： H01J37147

CPC分类号： H01J37/1474 ,  H01J2237/1504 ,  H01J2237/3175

摘要： A common deflection signal is provided, simultaneously, to individual yokes in an electron beam (e-beam) deflection apparatus of an electron beam projection lithography system. A single digital-to-analog converter (DAC) generates the common deflection signal. The common deflection signal is provided to individual programmable attenuators to adjust the signal for each individual yoke. The adjusted individual signal is amplified and passed to one of the individual yokes. The yokes are controlled to provide a curvilinear variable axis lens (CVAL) deflection that is adjusted to attenuate most of the noise from the common deflection signal that would have been present in a typical CVAL e-beam system.

摘要翻译： 公共偏转信号同时被提供给电子束投影光刻系统的电子束（e-beam）偏转装置中的各个轭。 单个数模转换器（DAC）产生公共偏转信号。 公共偏转信号被提供给单独的可编程衰减器以调整每个单独磁轭的信号。 经调整的单独信号被放大并传递到单独的轭中的一个。 磁轭被控制以提供曲线可变轴透镜（CVAL）偏转，其被调节以衰减来自常见的偏转信号的大部分噪声，这将会存在于典型的CVAL电子束系统中。

公开(公告)号：US20070012985A1

公开(公告)日：2007-01-18

申请号：US11525121

申请日：2006-09-22

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L27/108

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire capacitor and methods of making the same are disclosed. The nanowire capacitor includes a substrate and a semiconductor nanowire that is supported by the substrate. An insulator is formed on a portion of the surface of the nanowire. Additionally, an outer coaxial conductor is formed on a portion of the insulator and a contact coupled to the nanowire.

摘要翻译： 公开了一种纳米线电容器及其制造方法。 纳米线电容器包括由衬底支撑的衬底和半导体纳米线。 绝缘体形成在纳米线表面的一部分上。 此外，在绝缘体的一部分上形成一个外部同轴导体和一个与纳米线相连的触点。

公开(公告)号：US20060234519A1

公开(公告)日：2006-10-19

申请号：US11271488

申请日：2005-11-10

申请人： Yaoling Pan ,  David Stumbo

发明人： Yaoling Pan ,  David Stumbo

IPC分类号： H01L21/00

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/7606 ,  H01L29/78696 ,  Y10S977/901 ,  Y10S977/963

摘要： Embodiments of the present invention are provided for improved contact doping and annealing systems and processes. In embodiments, a plasma ion immersion implantation (PIII) process is used for contact doping of nanowires and other nanoelement based thin film devices. According to further embodiments of the present invention, pulsed laser annealing using laser energy at relatively low laser fluences below about 100 mJ/cm2 (e.g., less than about 50 mJ/cm2, e.g., between about 2 and 18 mJ/cm2) is used to anneal nanowire and other nanoelement-based devices on substrates, such as low temperature flexible substrates, e.g., plastic substrates.

摘要翻译： 提供本发明的实施例用于改进的接触掺杂和退火系统和工艺。 在实施例中，等离子体离子浸没注入（PIII）工艺用于纳米线和其它基于纳米元件的薄膜器件的接触掺杂。 根据本发明的另外的实施例，使用在低于约100mJ / cm 2（例如小于约50mJ / cm 2）的较低激光能量密度的激光能量进行脉冲激光退火， SUP>，例如约2和18mJ / cm 2之间）用于退火衬底上的纳米线和其它基于纳米元件的器件，例如低温柔性衬底，例如塑料衬底。

公开(公告)号：US07115971B2

公开(公告)日：2006-10-03

申请号：US10806361

申请日：2004-03-23

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire varactor diode and methods of making the same are disclosed. The structure comprises a coaxial capacitor running the length of the semiconductor nanowire. In one embodiment, a semiconductor nanowire of a first conductivity type is deposited on a substrate. An insulator is formed on at least a portion of the nanowire's surface. A region of the nanowire is doped with a second conductivity type material. A first electrical contact is formed on at least part of the insulator and the doped region. A second electrical contact is formed on a non-doped potion of the nanowire. During operation, the conductivity type at the surface of the nanowire inverts and a depletion region is formed upon application of a voltage to the first and second electrical contacts. The varactor diode thereby exhibits variable capacitance as a function of the applied voltage.

摘要翻译： 公开了一种纳米线变容二极管及其制造方法。 该结构包括运行半导体纳米线长度的同轴电容器。 在一个实施例中，第一导电类型的半导体纳米线沉积在衬底上。 在纳米线表面的至少一部分上形成绝缘体。 纳米线的区域掺杂有第二导电类型的材料。 在绝缘体和掺杂区域的至少一部分上形成第一电接触。 在纳米线的非掺杂药液上形成第二电接触。 在操作期间，纳米线表面的导电类型反转，并且在向第一和第二电触点施加电压时形成耗尽区。 因此，变容二极管作为施加电压的函数呈现可变电容。

公开(公告)号：US06674512B2

公开(公告)日：2004-01-06

申请号：US09924071

申请日：2001-08-07

申请人： W. Thomas Novak ,  David Stumbo ,  Fuyuhiko Inoue

发明人： W. Thomas Novak ,  David Stumbo ,  Fuyuhiko Inoue

IPC分类号： G03B2754

CPC分类号： G03F7/70775 ,  G01B9/02068 ,  G01B9/0207 ,  G01B9/02076

摘要： An interferometer measuring system comprising two moveable members and a reference member that may have significantly less movement, the group having a number of attached measurement mirrors, interferometers for measuring position and two optical support blocks for the interferometers. The interferometers are used to determine the measured optical path lengths to each of the moveable members and reference member and these positions are used to calculate the misalignment, or error in the relative positions of the moveable members with respect to the reference member. This calculated error is then used to correct the misalignment by moving the appropriate members in the manner directed by the calculation.

摘要翻译： 干涉仪测量系统包括两个可移动构件和可具有显着较小移动的参考构件，所述组具有多个附接的测量镜，用于测量位置的干涉仪和用于干涉仪的两个光学支撑块。 干涉仪用于确定对每个可移动构件和参考构件的测量光路长度，并且这些位置用于计算可移动构件相对于参考构件的相对位置的未对准或误差。 然后，使用该计算出的误差，通过以计算指导的方式移动适当的成员来校正不对准。