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    Oscillator circuit and device
    32.
    发明授权
    Oscillator circuit and device 有权

    公开(公告)号：US11777446B2

    公开(公告)日：2023-10-03

    申请号：US17728877

    申请日：2022-04-25

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Chi-Hsien Lin ,  Ho-Hsiang Chen ,  Hsien-Yuan Liao ,  Tzu-Jin Yeh ,  Ying-Ta Lu

    IPC: H03B5/12 ,  H03B1/04 ,  H03H7/01

    CPC classification number: H03B5/1228 ,  H03B1/04 ,  H03B5/1203 ,  H03B5/1206 ,  H03B5/1212 ,  H03B5/1243 ,  H03B5/1296 ,  H03H7/0161 ,  H03B2200/009

    Abstract: An oscillator includes a forward stage including first and second terminals and a transformer-coupled band-pass filter (BPF) coupled between the first and second terminals and including a coupling device between the first and second terminals, and a transformer including first and second windings in a metal layer of an IC. The first winding includes a first conductive structure coupled to the first terminal and a second conductive structure coupled to a voltage node, a third conductive structure including first and second extending portions connected to the first and second conductive structures. The second winding includes a fourth conductive structure including a third extending portion coupled to the voltage node, and a fourth extending portion coupled to the second terminal. The third extending portion is between the second conductive structure and the first extending portion, and the fourth extending portion is between the first conductive structure and the second extending portion.

    Phase shifter circuit, phase shifter layout and method of forming the same
    33.
    发明授权
    Phase shifter circuit, phase shifter layout and method of forming the same 有权

    公开(公告)号：US11354481B2

    公开(公告)日：2022-06-07

    申请号：US16442178

    申请日：2019-06-14

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Chi-Hsien Lin ,  Ho-Hsiang Chen ,  Hsien-Yuan Liao ,  Tzu-Jin Yeh ,  Ying-Ta Lu

    IPC: G06F30/398 ,  G03F1/70 ,  G03F1/36

    Abstract: A phase shifter includes an active region, a first and a second set of gates and a set of contacts. The active region extends in a first direction and is located at a first level. The first and second set of gates each extend in a second direction, overlap the active region and are located at a second level. The second set of gates are positioned along opposite edges of the active region, are configured to receive a first voltage, and are part of a first transistor. The first transistor is configured to adjust a first capacitance of the phase shifter responsive to the first voltage. The set of contacts extend in the second direction, are over the active region, are located at a third level, and are positioned between at least the second set of gates.

    Oscillator circuit and device
    34.
    发明授权
    Oscillator circuit and device 有权

    公开(公告)号：US11323068B2

    公开(公告)日：2022-05-03

    申请号：US17231245

    申请日：2021-04-15

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Chi-Hsien Lin ,  Ho-Hsiang Chen ,  Hsien-Yuan Liao ,  Tzu-Jin Yeh ,  Ying-Ta Lu

    IPC: H03B5/12 ,  H03B1/04 ,  H03H7/01

    Abstract: In some embodiments, a differential oscillator includes a differential circuit coupled between a first output node and a second output node and a transformer-coupled band-pass filter (BPF). The transformer-coupled BPF is coupled between the first output node and the second output node and includes a coupling device and a transformer. The coupling device is coupled between the first output node and the second output node. The transformer includes a first winding coupled between the first output node and a voltage node and a second winding coupled between the second output node and the voltage node.

    MEASUREMENT METHOD USING RADIO FREQUENCY POWER AMPLIFIER
    35.
    发明申请
    MEASUREMENT METHOD USING RADIO FREQUENCY POWER AMPLIFIER 有权

    公开(公告)号：US20220069779A1

    公开(公告)日：2022-03-03

    申请号：US17006892

    申请日：2020-08-31

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： En-Hsiang Yeh ,  Wen-Sheng Chen ,  Chia-Ming Liang ,  Chung-Ho Chai ,  Zong-You Li ,  Tzu-Jin Yeh

    IPC: H03F3/195 ,  H03F3/24

    Abstract: The measurement method includes operations of applying a first gate bias voltage to a gate terminal of a first transistor that is included in a radio frequency (RF) power amplifier during a direct current (DC) measurement period, wherein the first transistor operates in a linear operation mode during the DC measurement period; measuring a first drain-source voltage of the first transistor and a current flowing through the first transistor via a connection node during the DC measurement period; applying a second gate bias voltage and a drain bias voltage to a gate terminal and a drain terminal of a second transistor that is electrically connected to the first transistor via the connection node; and measuring a DC value of the second transistor via the connection node during the DC measurement period.

    Semiconductor device with polygonal inductive device
    36.
    发明授权
    Semiconductor device with polygonal inductive device 审中-公开

    公开(公告)号：US10672704B2

    公开(公告)日：2020-06-02

    申请号：US15965618

    申请日：2018-04-27

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

    Inventor： Wen-Sheng Chen ,  An-Hsun Lo ,  En-Hsiang Yeh ,  Tzu-Jin Yeh

    IPC: H01L23/522 ,  H01L49/02

    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.

    Methods for Reduced Gate Resistance FINFET
    37.
    发明申请
    Methods for Reduced Gate Resistance FINFET 有权
    降低栅极电阻FINFET的方法

    公开(公告)号：US20130288443A1

    公开(公告)日：2013-10-31

    申请号：US13927340

    申请日：2013-06-26

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd

    Inventor： Chewn-Pu Jou ,  Tzu-Jin Yeh ,  Hsieh-Hung Hsieh

    IPC: H01L29/66

    CPC classification number: H01L29/66795 ,  H01L29/42372 ,  H01L29/785

    Abstract: Methods for forming reduced gate resistance finFETs. Methods for a metal gate transistor structure are disclosed including forming a plurality of semiconductor fins formed over a semiconductor substrate, the fins being arranged in parallel and spaced apart; a metal containing gate electrode formed over the semiconductor substrate and overlying a channel gate region of each of the semiconductor fins, and extending over the semiconductor substrate between the semiconductor fins; an interlevel dielectric layer overlying the gate electrode and the semiconductor substrate; and a plurality of contacts disposed in the interlevel dielectric layer and extending through the interlevel dielectric layer to the gate electrode; a low resistance metal strap formed over the interlevel dielectric layer and coupled to the gate electrode by the plurality of contacts; wherein the plurality of contacts are spaced apart from the channel gate regions of the semiconductor fins. Additional methods are disclosed.

    Abstract translation: 形成栅极电阻finFET的方法。 公开了一种金属栅极晶体管结构的方法，包括形成在半导体衬底上形成的多个半导体鳍片，所述鳍片平行布置并间隔开; 一个含金属的栅电极，形成在半导体衬底之上，并且覆盖每个半导体鳍片的沟道栅极区域，并且在半导体鳍片之间的半导体衬底上延伸; 覆盖所述栅电极和所述半导体衬底的层间电介质层; 以及多个触点，其布置在所述层间电介质层中并且延伸穿过所述层间电介质层到所述栅电极; 形成在所述层间电介质层上并且由所述多个触点耦合到所述栅电极的低电阻金属带; 其中所述多个触点与所述半导体鳍片的沟道栅极区域间隔开。 公开了另外的方法。

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