公开(公告)号：US20070262380A1

公开(公告)日：2007-11-15

申请号：US11796802

申请日：2007-04-30

申请人： Juri Kato ,  Kei Kanemoto

发明人： Juri Kato ,  Kei Kanemoto

IPC分类号： H01L27/12

CPC分类号： H01L21/823481 ,  H01L21/76202 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/1203

摘要： A semiconductor device comprises: a semiconductor substrate including a SOI region and a bulk region; a first element formed in the SOI region; a second element formed in the bulk region; a first element isolation layer including a trench structure; and a second element isolation layer including a LOCOS structure. The first element is separated from the second element by the first isolation layer and the second isolation layer.

摘要翻译： 半导体器件包括：包括SOI区域和体区域的半导体衬底; 形成在SOI区域中的第一元件; 形成在本体区域中的第二元件; 包括沟槽结构的第一元件隔离层; 以及包括LOCOS结构的第二元件隔离层。 第一元件通过第一隔离层和第二隔离层与第二元件分离。

公开(公告)号：US07271447B2

公开(公告)日：2007-09-18

申请号：US11212400

申请日：2005-08-26

申请人： Teruo Takizawa ,  Kei Kanemoto ,  Juri Kato ,  Toshiki Hara

发明人： Teruo Takizawa ,  Kei Kanemoto ,  Juri Kato ,  Toshiki Hara

IPC分类号： H01L27/01

CPC分类号： H01L29/66772 ,  H01L29/78654

摘要： A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and that has an etching selection ratio smaller than that of the first semiconductor layer, a cavity portion that is formed below the second semiconductor layer by removing a portion of the first semiconductor layer, a thermal oxidation film that is formed on the surface of the second semiconductor layer in the cavity portion, and a buried insulating film that is buried in the cavity portion.

摘要翻译： 半导体衬底包括形成在半导体基底衬底上的第一半导体层，形成在第一半导体层上并具有小于第一半导体层的蚀刻选择比的蚀刻选择比的第二半导体层， 通过去除第一半导体层的一部分而形成在第二半导体层的下方，形成在空腔部分中的第二半导体层的表面上的热氧化膜和埋在空腔部分中的埋入绝缘膜。

公开(公告)号：US20070076482A1

公开(公告)日：2007-04-05

申请号：US11535693

申请日：2006-09-27

申请人： Juri Kato

发明人： Juri Kato

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/42336 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a gate electrode provided on a channel region of a semiconductor layer and a floating gate provided on a back side of the semiconductor layer with a first insulating layer interposed therebetween.

摘要翻译： 非易失性半导体存储器件包括设置在半导体层的沟道区上的栅极电极和设置在半导体层背面的浮置栅极，其间插入有第一绝缘层。

公开(公告)号：US20070075317A1

公开(公告)日：2007-04-05

申请号：US11489572

申请日：2006-07-20

申请人： Juri Kato ,  Hideaki Oka ,  Kei Kanemoto ,  Toshiki Hara ,  Tetsushi Sakai

发明人： Juri Kato ,  Hideaki Oka ,  Kei Kanemoto ,  Toshiki Hara ,  Tetsushi Sakai

IPC分类号： H01L29/04

CPC分类号： H01L27/1203 ,  H01L21/84

摘要： A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer; a second insulating layer formed on the first single-crystal semiconductor layer and having a film thickness smaller than a film thickness of the first insulating layer; a second single-crystal semiconductor layer formed on the second insulating layer; a gate electrode formed on the second single-crystal semiconductor layer; and source and drain layers that are formed on the second single-crystal semiconductor layer and arranged on respective sides of the gate electrode.

摘要翻译： 半导体器件包括由形成在第一绝缘层上的第一单晶半导体层构成的背栅电极; 形成在所述第一单晶半导体层上并具有比所述第一绝缘层的膜厚小的膜厚度的第二绝缘层; 形成在所述第二绝缘层上的第二单晶半导体层; 形成在第二单晶半导体层上的栅电极; 以及形成在第二单晶半导体层上并且布置在栅电极的相应侧上的源极和漏极层。

公开(公告)号：US20060220128A1

公开(公告)日：2006-10-05

申请号：US11192898

申请日：2005-07-28

申请人： Juri Kato

发明人： Juri Kato

IPC分类号： H01L27/12

CPC分类号： H01L21/84 ,  H01L21/76283 ,  H01L27/105 ,  H01L27/1203

摘要： A semiconductor substrate comprising a semiconductor base, a dielectric layer formed in at least a part of an area on the semiconductor base, and a single crystal semiconductor layers having mutually different film thicknesses, disposed on the dielectric layer and formed by epitaxial growth.

摘要翻译： 包括半导体基底，形成在半导体基底上的区域的至少一部分中的电介质层和具有相互不同的膜厚度的单晶半导体层的半导体衬底设置在电介质层上并通过外延生长形成。

公开(公告)号：US20060197163A1

公开(公告)日：2006-09-07

申请号：US11363694

申请日：2006-02-27

申请人： Juri Kato

发明人： Juri Kato

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/785 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/78618 ,  H01L2029/7858

摘要： A semiconductor device comprising: a semiconductor layer having a film formation face in a side wall, the side wall being film-formed with epitaxial-growth; a gate electrode arranged on the side wall of the semiconductor layer; a source layer arranged in one side of the gate electrode, the source layer being formed in the semiconductor layer; and a drain layer arranged in other side of the gate electrode, the drain layer being formed in the semiconductor layer.

摘要翻译： 一种半导体器件，包括：半导体层，其具有在侧壁中的成膜面，所述侧壁被外延生长成膜; 设置在所述半导体层的侧壁上的栅电极; 源极层，布置在栅电极的一侧，源极层形成在半导体层中; 以及排列在所述栅电极的另一侧的漏极层，所述漏极层形成在所述半导体层中。

公开(公告)号：US20060046393A1

公开(公告)日：2006-03-02

申请号：US11212519

申请日：2005-08-25

申请人： Juri Kato

发明人： Juri Kato

IPC分类号： H01L21/336

CPC分类号： H01L29/402 ,  H01L29/78624 ,  H01L29/78648

摘要： A semiconductor device includes a gate electrode formed on a semiconductor layer, source and drain layers formed in the semiconductor layer and disposed on both sides of the gate electrode, and a field plate disposed at the back of the semiconductor layer with an insulating layer provided therebetween.

公开(公告)号：US5879979A

公开(公告)日：1999-03-09

申请号：US412939

申请日：1995-03-29

申请人： Juri Kato ,  Kazuo Tanaka

发明人： Juri Kato ,  Kazuo Tanaka

IPC分类号： H01L21/28 ,  H01L21/3205 ,  H01L21/8238 ,  H01L23/52 ,  H01L27/04 ,  H01L27/092 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L21/823835 ,  H01L29/4933 ,  H01L29/4983 ,  H01L2924/0002

摘要： In a CMOS-element-containing semiconductor device, the CMOS element comprises: a silicon substrate; an n-channel MOS element formed on the silicon substrate and including an n-type source/drain region, a gate oxide film and a gate electrode; a p-channel MOS element formed on the silicon substrate and including a p-type source/drain region, a gate oxide film and a gate electrode; and a gate wiring layer electrically interconnecting the gate electrode of the n-channel MOS element and the gate electrode of the p-channel MOS element with one another. At least one of the p-channel MOS element gate electrode, the n-channel MOS element gate electrode and the gate wiring layer include at least in part a metal silicide layer. The gate electrodes and the gate wiring layer contain impurities consisting of at least one of a III group dopant and a V group dopant in total concentration of at most 3.times.10.sup.20 atoms cm.sup.-3.

摘要翻译： 在含CMOS元件的半导体器件中，CMOS元件包括：硅衬底; 形成在硅衬底上并包括n型源极/漏极区，栅极氧化膜和栅电极的n沟道MOS元件; 形成在硅衬底上并包括p型源极/漏极区，栅极氧化膜和栅电极的p沟道MOS元件; 以及将n沟道MOS元件的栅电极和p沟道MOS元件的栅电极彼此电连接的栅极布线层。 p沟道MOS元件栅极电极，n沟道MOS元件栅极电极和栅极布线层中的至少一个至少部分地包括金属硅化物层。 栅电极和栅极布线层含有由III族掺杂剂和V族掺杂剂中的至少一种构成的杂质，总浓度为3×10 20原子cm -3以下。

公开(公告)号：US4669176A

公开(公告)日：1987-06-02

申请号：US756895

申请日：1985-07-19

申请人： Juri Kato

发明人： Juri Kato

IPC分类号： H01L21/225 ,  H01L21/385

CPC分类号： H01L21/2257 ,  Y10S438/923

摘要： A method for forming a diffused region on a semiconductor substrate is provided. A silicide layer is formed in a region of a substrate where a diffused layer is to be formed and a material containing an impurity to be defined into the substrate deposited on the silicide layer. The device is heat treated to cause the impurity to diffuse through the silicide layer into the substrate. The method may be used to produce a MOSFET.

摘要翻译： 提供了一种在半导体衬底上形成扩散区域的方法。 在要形成扩散层的基板的区域中形成硅化物层，并且将含有要限定的杂质的材料沉积到硅化物层上。 该器件被热处理以使杂质通过硅化物层扩散到衬底中。 该方法可用于制造MOSFET。

公开(公告)号：US09030204B2

公开(公告)日：2015-05-12

申请号：US13525695

申请日：2012-06-18

申请人： Takao Miyazawa ,  Juri Kato

发明人： Takao Miyazawa ,  Juri Kato

IPC分类号： G01R29/12 ,  G01N27/02 ,  G01R27/08 ,  G01N17/04 ,  G01R31/04

CPC分类号： G01R29/12 ,  G01N17/04 ,  G01N27/021 ,  G01R27/08

摘要： A sensor device includes a first electrode, a second electrode, a gap forming member and a functional element. The first electrode is composed of a first metallic material. The second electrode is spaced apart from the first electrode, and composed of a second metallic material. The gap forming member is arranged with a gap being formed between the gap forming member and a portion of a surface of the first electrode. The functional element is configured and arranged to measure a difference in electric potential between the first electrode and the second electrode so that a state of a measurement site to be measured is measured based on the difference in electric potential as measured by the functional element.

摘要翻译： 传感器装置包括第一电极，第二电极，间隙形成部件和功能元件。 第一电极由第一金属材料构成。 第二电极与第一电极间隔开，并由第二金属材料构成。 间隙形成构件被布置成在间隙形成构件和第一电极的表面的一部分之间形成间隙。 功能元件被配置和布置成测量第一电极和第二电极之间的电位差，使得基于由功能元件测量的电位差来测量待测量的测量部位的状态。