公开(公告)号：US07138220B2

公开(公告)日：2006-11-21

申请号：US11058671

申请日：2005-02-16

申请人： Hirotaka Yamaguchi

发明人： Hirotaka Yamaguchi

IPC分类号： G02F1/1335 ,  G02F1/1343

CPC分类号： G02F1/133553 ,  G02F1/133555 ,  G02F1/1362 ,  G02F1/136227 ,  G02F1/1368

摘要： To provide a liquid crystal display apparatus exhibiting optimum display performance despite reduction in the number of PR(photolithography) processes, and a method for producing the apparatus. A method for producing a liquid crystal display apparatus having a first substrate including a thin film transistor and a reflector on an insulating substrate. An etching mask is formed on a metal layer formed on the insulating substrate and, using this etching mask, the metal layer is etched to form a constituent portion of the thin film transistor and protrusions. Only the etching mask is caused to reflow to cover exposed surface portions of the constituent portion of the thin film transistor and protrusions and near-by surface portions of the insulating substrate with the etching mask as the insulating substrate is partially exposed. Using the etching mask, recesses are formed in an exposed area of the insulating substrate. A reflector is formed on the protrusions and recesses.

公开(公告)号：US06891196B2

公开(公告)日：2005-05-10

申请号：US10617035

申请日：2003-07-11

申请人： Hiroaki Tanaka ,  Hirotaka Yamaguchi ,  Wakahiko Kaneko ,  Michiaki Sakamoto ,  Satoshi Ihida ,  Takasuke Hayase ,  Tae Yoshikawa ,  Hiroshi Kanou

发明人： Hiroaki Tanaka ,  Hirotaka Yamaguchi ,  Wakahiko Kaneko ,  Michiaki Sakamoto ,  Satoshi Ihida ,  Takasuke Hayase ,  Tae Yoshikawa ,  Hiroshi Kanou

IPC分类号： G02F1/1345 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/12 ,  G02F1/134363 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288

摘要： An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode is isolated in each layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer and a TFF area. A drain electrode layer is formed by a first passivation film with the first passivation film formed as an upper layer. In a second passivation film, formed above the first passivation film, are bored a first opening through the first and second passivation films and a second opening through the second passivation film. A wiring connection layer is formed by ITO provided as an uppermost layer. A storage capacitance unit, including the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is connected to the pixel electrode.

摘要翻译： 通过绝缘膜在每一层隔离具有栅电极，漏电极和像素电极的沟道保护型有源矩阵基板。 有源矩阵基板由四个掩模制成。 栅极电极层，栅极绝缘膜和a-Si层在透明绝缘基板上被加工成相同的形状以形成栅极电极层和TFF区域。 漏极电极层由第一钝化膜形成，第一钝化膜形成为上层。 在形成在第一钝化膜之上的第二钝化膜中，穿过第一和第二钝化膜的第一开口和通过第二钝化膜的第二开口。 由设置为最上层的ITO形成布线连接层。 夹持在栅电极和相对于栅电极形成为共层的电极层之间的第一和第二钝化膜的存储电容单元连接到像素电极。

公开(公告)号：US20100188593A1

公开(公告)日：2010-07-29

申请号：US12693771

申请日：2010-01-26

申请人： Hirotaka Yamaguchi ,  Kenichi Takatori

发明人： Hirotaka Yamaguchi ,  Kenichi Takatori

IPC分类号： G02F1/136 ,  H01L27/088 ,  H01L21/77

CPC分类号： H01L27/1248 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/78681 ,  H01L29/7869

摘要： A vertically aligned thin-film transistor array substrate in which there is no reduction in aperture ratio includes an etching-stop layer formed on an insulating layer; a passivation layer formed on the insulating layer that includes the etching-stop layer; a depression formed in the passivation layer and hollowing the passivation layer to the surface of the etching-stop layer; and a pixel electrode, which is recessed in conformity with the depression, formed on the passivation layer that includes the depression; wherein the etching-stop layer comprises a transparent semiconductor.

摘要翻译： 其中孔径比不减小的垂直排列的薄膜晶体管阵列基板包括形成在绝缘层上的蚀刻停止层; 形成在包括所述蚀刻停止层的所述绝缘层上的钝化层; 形成在钝化层中的凹陷部，并将钝化层中空到蚀刻停止层的表面; 以及形成在包括所述凹部的所述钝化层上的与所述凹部一致地凹陷的像素电极; 其中所述蚀刻停止层包括透明半导体。

公开(公告)号：US20050158639A1

公开(公告)日：2005-07-21

申请号：US11058671

申请日：2005-02-16

申请人： Hirotaka Yamaguchi

发明人： Hirotaka Yamaguchi

IPC分类号： G02F1/13 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  G09F9/35 ,  H01L21/28 ,  H01L21/336 ,  H01L29/786 ,  G02F1/1333 ,  C09K19/00

CPC分类号： G02F1/133553 ,  G02F1/133555 ,  G02F1/1362 ,  G02F1/136227 ,  G02F1/1368

摘要： To provide a liquid crystal display apparatus exhibiting optimum display performance despite reduction in the number of PR(photolithography) processes, and a method for producing the apparatus. A method for producing a liquid crystal display apparatus having a first substrate including a thin film transistor and a reflector on an insulating substrate. An etching mask is formed on a metal layer formed on the insulating substrate and, using this etching mask, the metal layer is etched to form a constituent portion of the thin film transistor and protrusions. Only the etching mask is caused to reflow to cover exposed surface portions of the constituent portion of the thin film transistor and protrusions and near-by surface portions of the insulating substrate with the etching mask as the insulating substrate is partially exposed. Using the etching mask, recesses are formed in an exposed area of the insulating substrate. A reflector is formed on the protrusions and recesses.

公开(公告)号：US06849724B1

公开(公告)日：2005-02-01

申请号：US09646825

申请日：1999-03-24

申请人： Satoshi Mori ,  Hiromi Nakanishi ,  Hiroyuki Oki ,  Hirotaka Yamaguchi

发明人： Satoshi Mori ,  Hiromi Nakanishi ,  Hiroyuki Oki ,  Hirotaka Yamaguchi

IPC分类号： C12N15/09 ,  A01H5/00 ,  C12N5/10 ,  C12N9/02 ,  C12N15/82 ,  C12P19/34 ,  C07H21/04 ,  C12N15/00

CPC分类号： C12N9/0036 ,  C12N15/8216 ,  C12N15/8243 ,  C12N15/8261 ,  Y02A40/146

摘要： A method for achieving the sufficient expression of a gene in a useful higher plant which has been transformed by transferring the above gene encoding a protein having a function carried by another organism so as to impart the function to the plant. Namely, a method for transforming a useful plant by transferring a gene of another species into the plant characterized in that the region of a factor relating to the poly(A) addition of the mRNA of the useful plant to be transformed contained in the base sequence of the gene of the other species is denatured into another base sequence not relating to the poly(A) addition of the mRNA without substantially altering the function of the protein encoded by the gene to be transferred; and a gene usable in the gene transfer.

摘要翻译： 通过转移上述编码具有由另一种生物体携带的功能的蛋白质的基因转化的有用的较高植物中的基因的充分表达以赋予植物功能的方法。 即，通过将其他物种的基因转移到植物中来转化有用植物的方法，其特征在于与碱基序列中包含的待转化有用植物的mRNA的poly（A）加成相关的因子的区域 的其他物种的基因被变性成不与mRNA的poly（A）添加无关的另一个碱基序列，而基本上不改变由待转移的基因编码的蛋白质的功能; 和可用于基因转移的基因。

公开(公告)号：US06674093B1

公开(公告)日：2004-01-06

申请号：US09695321

申请日：2000-10-25

申请人： Hiroaki Tanaka ,  Hirotaka Yamaguchi ,  Wakahiko Kaneko ,  Michiaki Sakamoto ,  Satoshi Ihida ,  Takasuke Hayase ,  Tae Yoshikawa ,  Hiroshi Kanou

发明人： Hiroaki Tanaka ,  Hirotaka Yamaguchi ,  Wakahiko Kaneko ,  Michiaki Sakamoto ,  Satoshi Ihida ,  Takasuke Hayase ,  Tae Yoshikawa ,  Hiroshi Kanou

IPC分类号： H01L29786

CPC分类号： H01L27/12 ,  G02F1/134363 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288

摘要： An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode isolated from one another from layer to layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer (102 of FIG. 6) and a TFF area. A drain electrode layer (106 of FIG. 6) is formed by a first passivation film (105 of FIG. 6) via a first passivation film (105 of FIG. 6) formed as an upper layer. In a second passivation film (107 of FIG. 6) formed above it are bored an opening through the first and second passivation films and an opening through the second passivation film. A wiring connection layer is formed by ITO (108 of FIG. 6) provided as an uppermost layer. A storage capacitance unit, comprised of the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is provided in the pixel electrode.

摘要翻译： 沟道保护型有源矩阵基板，具有通过绝缘膜从一层到另一层隔离的栅电极，漏电极和像素电极。 有源矩阵基板由四个掩模制成。 栅极电极层，栅极绝缘膜和a-Si层在透明绝缘基板上被加工成相同的形状以形成栅极电极层（图6的102）和TFF区域。 经由形成为上层的第一钝化膜（图6的105）由第一钝化膜（图6的105）形成漏极电极层（图6的106）。 在其上形成的第二钝化膜（图6的107）中，其穿过第一和第二钝化膜的开口以及通过第二钝化膜的开口。 布线连接层由作为最上层设置的ITO（图6的108）形成。 在像素电极中设置存储电容单元，该第一钝化膜和第二钝化膜夹在栅电极和形成为相对于栅电极的共层的电极层之间。