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公开(公告)号:US10181823B1
公开(公告)日:2019-01-15
申请号:US15652079
申请日:2017-07-17
Applicant: pSemi Corporation
Inventor: Chih-Chieh Cheng , Tero Tapio Ranta
Abstract: A ultra-compact coupler designed to sample the actual output power of a power amplifier and which is “VSWR insensitive”, such that reflected power is essentially not coupled to a detector circuit and only forward power is detected and processed. In a first embodiment, a coupler is situated between the final amplifier stage of a power amplifier and an output impedance matching network, and is specially configured for operation in a low impedance environment in conjunction with a detector circuit, thereby substantially reducing the areal size of the coupler. In a second embodiment, a coupler is integrated within an output impedance matching network coupled to the final amplifier stage of a power amplifier so as to share an inductor between the coupler and the output impedance matching network, thereby further substantially reducing the areal size of the coupler.
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公开(公告)号:US10038414B2
公开(公告)日:2018-07-31
申请号:US15372260
申请日:2016-12-07
Applicant: pSemi Corporation
Inventor: Tero Tapio Ranta , Chih-Chieh Cheng , Kevin Roberts
CPC classification number: H03F1/56 , H03F3/19 , H03F3/195 , H03F3/213 , H03F2200/378 , H03F2200/387 , H03F2200/451
Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
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公开(公告)号:US20180175807A1
公开(公告)日:2018-06-21
申请号:US15895863
申请日:2018-02-13
Applicant: pSemi Corporation
Inventor: Hossein Noori , Chih-Chieh Cheng
CPC classification number: H03F1/3205 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/18 , H03F2200/21 , H03F2200/211 , H03F2200/213 , H03F2200/222 , H03F2200/225 , H03F2200/24 , H03F2200/243 , H03F2200/249 , H03F2200/27 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/312 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/417 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/495 , H03F2200/546 , H03F2200/72 , H03F2200/75 , H03G1/0029 , H03G1/0088 , H03G1/0094 , H03G3/001 , H03G3/008 , H03G3/10 , H03G2201/106 , H03G2201/307 , H03G2201/504
Abstract: A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.
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