公开(公告)号：US07761647B2

公开(公告)日：2010-07-20

申请号：US11763457

申请日：2007-06-15

Applicant: Chih-Chin Yang

Inventor： Chih-Chin Yang

IPC: G06F13/00

CPC classification number: G06F13/385 ,  G06F3/0605 ,  G06F3/0661 ,  G06F3/0676

Abstract: A storage device with automatic-switching function is disclosed. When the storage device is coupled to a USB interface, the power provided by the USB interface turns the USB/SATA converter on to convert data from the USB interface into SATA format and transmit to a hard disk. When the storage device is coupled to a SATA interface instead of the USB interface, the power provided by the USB interface does not turn the USB/SATA converter on to convert data. In this way, the data from the SATA interface directly transmit to the hard disk.

Abstract translation: 公开了具有自动切换功能的存储装置。 当存储设备耦合到USB接口时，由USB接口提供的电源将USB / SATA转换器打开，将USB接口的数据转换为SATA格式并传输到硬盘。 当存储设备耦合到SATA接口而不是USB接口时，由USB接口提供的电源不会打开USB / SATA转换器来转换数据。 以这种方式，SATA接口的数据直接传输到硬盘。

公开(公告)号：US07600168B2

公开(公告)日：2009-10-06

申请号：US11640863

申请日：2006-12-19

Applicant: Po-Yuan Chen ,  Cheng-Sheng Chan ,  Hui-Ming Lin

Inventor： Po-Yuan Chen ,  Cheng-Sheng Chan ,  Hui-Ming Lin

IPC: G01R31/28

CPC classification number: G01R31/318516 ,  G01R31/318536 ,  G01R31/318541

Abstract: An apparatus provided with programmable scan chains includes a scan chain having a scan input port and a scan output port, a plurality of first I/O ports, an input port selector for selecting one of the plurality of first I/O ports to be coupled to the scan input port, a plurality of second I/O ports, an output port selector for selecting one of the plurality of second I/O ports to be coupled to said scan output port. Further, an apparatus provided with programmable scan chains includes N scan chains, each scan chain having a scan input port and scan output port, M first I/O ports, an input port selector for selecting N of the first I/O ports to be coupled to the N scan input ports, K second I/O ports, and an output port selector for selecting N of the second I/O ports to be coupled to the N scan output ports.

Abstract translation: 提供有可编程扫描链的装置包括具有扫描输入端口和扫描输出端口的扫描链，多个第一I / O端口，用于选择要耦合的多个第一I / O端口之一的输入端口选择器 到扫描输入端口，多个第二I / O端口，用于选择要耦合到所述扫描输出端口的多个第二I / O端口中的一个的输出端口选择器。 另外，设置有可编程扫描链的装置包括N个扫描链，每个扫描链具有扫描输入端口和扫描输出端口，M个第一I / O端口，用于选择N个第一I / O端口的输入端口选择器 耦合到N个扫描输入端口，K个第二I / O端口，以及输出端口选择器，用于选择N个与N个扫描输出端口耦合的第二I / O端口。

公开(公告)号：US20090164877A1

公开(公告)日：2009-06-25

申请号：US12272725

申请日：2008-11-17

Applicant: Si-En Chang ,  Kun-Shien Tsai ,  Ching-Hung Wu ,  Ming-Deng Hsieh ,  Ming-Tsai Hsu

Inventor： Si-En Chang ,  Kun-Shien Tsai ,  Ching-Hung Wu ,  Ming-Deng Hsieh ,  Ming-Tsai Hsu

IPC: G06F17/00 ,  G10L21/00

CPC classification number: H04N5/775 ,  G11B27/034 ,  G11B27/11 ,  G11C2207/16 ,  H04N21/42203 ,  H04N21/4325 ,  H04N21/4334 ,  H04N21/8106 ,  H04N21/8153

Abstract: A memo voice recording/playback method and a digital photo frame using the method are provided. The method is suitable for a digital image playback apparatus. The digital image playback apparatus has memo voice recording function and memo voice playback function and includes a display unit for image displaying. The method includes: displaying an image; judging whether memo voice recording function of the digital image playback apparatus is enabled or not; and executing a memo voice recording procedure to edit the recorded memo voice into a memo voice file associated with the image if it is judged that the memo voice recording function is enabled.

Abstract translation: 提供了使用该方法的备忘录录音/播放方法和数码相框。 该方法适用于数字图像播放装置。 数字图像播放装置具有备注语音记录功能和备忘录语音播放功能，并且包括用于图像显示的显示单元。 该方法包括：显示图像; 判断数字图像播放装置的备忘录录音功能是否启用; 以及如果判断为所述备忘录录音功能被使能，则执行备忘录录音过程以将所记录的备忘录语音编辑成与所述图像相关联的备忘录语音文件。

公开(公告)号：US07310739B2

公开(公告)日：2007-12-18

申请号：US10904181

申请日：2004-10-28

Applicant: Arthur Wu ,  Wen-Hwa Chou

Inventor： Arthur Wu ,  Wen-Hwa Chou

IPC: G06F9/00

CPC classification number: G06F1/3215

Abstract: A universal serial bus (USB) with a power-saving mode and an operating method thereof are provided. When the USB peripheral is coupled to the USB host, the USB host core logic of the USB host transmits an inquiry request via a USB transceiver to inquire whether or not the USB peripheral supports the power-saving mode. The core logic of the USB peripheral responds via the USB transceiver that the power-saving mode is supported. Then the USB peripheral is off-line and then is shifted to be on-line for operating the power-saving mode. The USB host is also switched to the power-saving mode. Under the power-saving mode, the data are respectively transceived by the serial transceivers. The clock frequency of the serial transceiver can be adjusted according to the request of data transmission.

Abstract translation: 提供具有省电模式的通用串行总线（USB）及其操作方法。 当USB外围设备耦合到USB主机时，USB主机的USB主机核心逻辑通过USB收发器发送查询请求，以询问USB外设是否支持省电模式。 USB外设的核心逻辑通过USB收发器进行响应，支持省电模式。 然后USB外设离线，然后转移到在线以进行省电模式。 USB主机也切换到省电模式。 在省电模式下，数据分别由串行收发器收发。 串行收发器的时钟频率可以根据数据传输的要求进行调整。

公开(公告)号：US07240369B2

公开(公告)日：2007-07-03

申请号：US10425612

申请日：2003-04-30

Applicant: Wen-Hwa Chou ,  Yun-Kuo Lee

Inventor： Wen-Hwa Chou ,  Yun-Kuo Lee

IPC: H04L9/32 ,  H04L9/00 ,  G06F12/14 ,  G06F13/20

CPC classification number: G06F21/34

Abstract: A plug and play device and an access control method, in which the plug and play device includes an access control device and a main function device. When the plug and play device is connected to a host, the access control device is first connected to the host to execute an authorization procedure. The user is not authorized if the authentication procedure rejects the user. In this case, the plug and play device denies the host control. Conversely, the user is authorized if the authentication procedure approves the user. In this case, the plug and play device connects the main function device to the host and accepts control by the host. After the host loads a proper driver, it may control the plug and play device.

Abstract translation: 一种即插即用设备和访问控制方法，其中即插即用设备包括访问控制设备和主功能设备。 当即插即用设备连接到主机时，首先将访问控制设备连接到主机以执行授权过程。 如果认证过程拒绝用户，则用户未被授权。 在这种情况下，即插即用设备拒绝主机控制。 相反，如果认证过程批准用户，则授权用户。 在这种情况下，即插即用设备将主功能设备连接到主机，并接受主机的控制。 主机加载正确的驱动程序后，可以控制即插即用设备。

公开(公告)号：US07194057B2

公开(公告)日：2007-03-20

申请号：US11312694

申请日：2005-12-21

Applicant: Christine Lin

Inventor： Christine Lin

IPC: H03D3/24

CPC classification number: H04L7/0337

Abstract: A system and method of high speed clock/data recovery, which is used to recover the high speed clock/data through oversampling technique, wherein the internal clock with frequency lower than the high speed data is used for data recovery. Only three clocks are used in the digital circuit without involving all the oversampling clock phases to make the design timing complicated and critical. The system and method provide a simple clock structure to implement the digital circuit of high speed clock/data recovery in a robust and easy way. Furthermore a phase selection mechanism which decides the clock phase of the high speed data is provided as well.

Abstract translation: 高速时钟/数据恢复系统和方法，用于通过过采样技术恢复高速时钟/数据，其中频率低于高速数据的内部时钟用于数据恢复。 数字电路中仅使用三个时钟，而不涉及所有过采样时钟相位，从而使设计时序复杂且至关重要。 该系统和方法提供了一种简单的时钟结构，以强大而简单的方式实现高速时钟/数据恢复的数字电路。 此外，还提供了决定高速数据的时钟相位的相位选择机构。

公开(公告)号：US07170439B1

公开(公告)日：2007-01-30

申请号：US11307007

申请日：2006-01-19

Applicant: Hsuan-Fan Chen

Inventor： Hsuan-Fan Chen

IPC: H03M1/12

CPC classification number: H03M1/1009 ,  H03M1/0678 ,  H03M1/468 ,  H03M1/804

Abstract: A self-calibration circuit for capacitance mismatch is provided. The circuit comprises a sample-and-hold (S/H) circuit, a comparator, and a switch control circuit. The S/H circuit comprises a compensation capacitor array, a target capacitor, and a reference capacitor. The S/H circuit provides an output voltage, wherein the output voltage is an operation result based on the capacitance of the target capacitor and the reference capacitor, and the equivalent capacitance of the compensation capacitor array. The comparator provides a comparison signal according to whether the output voltage of the S/H circuit is positive or negative. The switch control circuit controls the equivalent capacitance of the array according to the comparison signal such that the result of the target capacitance added to the equivalent capacitance of the array gradually approximates the reference capacitance with each cycle of a clock signal.

Abstract translation: 提供了一种用于电容失配的自校准电路。 电路包括采样保持（S / H）电路，比较器和开关控制电路。 S / H电路包括补偿电容器阵列，目标电容器和参考电容器。 S / H电路提供输出电压，其中输出电压是基于目标电容器和参考电容器的电容的运算结果以及补偿电容器阵列的等效电容。 比较器根据S / H电路的输出电压是正还是负，提供比较信号。 开关控制电路根据比较信号控制阵列的等效电容，使得添加到阵列的等效电容的目标电容的结果在时钟信号的每个周期逐渐接近参考电容。

公开(公告)号：US07124235B2

公开(公告)日：2006-10-17

申请号：US10885644

申请日：2004-07-08

Applicant: Chi-Jane Lee ,  Yun-Kuo Lee

Inventor： Chi-Jane Lee ,  Yun-Kuo Lee

IPC: G06F13/36

CPC classification number: G06F13/4081 ,  G06F2213/0042

Abstract: A USB apparatus includes an upstream port, a downstream port, a connection detector and a controller. The connection detector is connected to the upstream port and the downstream port, and is for detecting connection statuses of the upstream port and the downstream port to generate a detecting signal accordingly. The controller is used for controlling the USB apparatus to be operated at a host mode or a hub mode according to the detection signal and control method.

Abstract translation: USB装置包括上游端口，下游端口，连接检测器和控制器。 连接检测器连接到上游端口和下游端口，用于检测上游端口和下游端口的连接状态，以产生相应的检测信号。 控制器用于根据检测信号和控制方法控制USB设备在主机模式或集线器模式下工作。

公开(公告)号：US20020024399A1

公开(公告)日：2002-02-28

申请号：US09925424

申请日：2001-08-10

Applicant: PROLIFIC TECHNOLOGY INC.

Inventor： Chia-Chang Hsu ,  Chih-Shih Yang

IPC: H03K007/08

CPC classification number: H03K7/08 ,  H02P6/08

Abstract: A DC brushless motor operation speed control method is disclosed. First, a linearly voltage dependent current source is used to charge a capacitor and the terminal voltage of the capacitor is coupled to a linearly voltage dependent base frequency level detector. When the output voltage of the capacitor reaches the base frequency reference voltage, the signal output from the base frequency level detector will make the capacitor discharge, outputting a series of base frequency triangular waves. Under different supply voltages, all the generated base frequency triangular waves have the same cycle time. The base frequency triangular waves are transmitted to a speed control comparator. Through pulse width modulation, the speed control reference voltage adjusts the output pulse width of the comparator and thereby controls the speed of the motor.

Abstract translation: 公开了一种直流无刷电机运行速度控制方法。 首先，使用线性电压相关电流源对电容器充电，并且电容器的端子电压耦合到线性电压依赖的基极频率电平检测器。 当电容器的输出电压达到基准频率参考电压时，从基频电平检测器输出的信号将使电容放电，输出一系列基频三角波。 在不同的电源电压下，所有产生的基频三角波具有相同的周期时间。 基频三角波被传送到速度控制比较器。 通过脉宽调制，速度控制参考电压调节比较器的输出脉冲宽度，从而控制电机的转速。

公开(公告)号：US20240241852A1

公开(公告)日：2024-07-18

申请号：US18541502

申请日：2023-12-15

Applicant: Prolific Technology INC.

Inventor： Shun-Liang Yang ,  Chiun-Shiu Chen ,  Chih-Chin Yang

IPC: G06F13/42

CPC classification number: G06F13/4282 ,  G06F2213/0016

Abstract: A serial communication bus system with dynamic address assignment and its control method are provided in this invention. The system allows the master device to directly assign device addresses to slave devices without the need for additional signals. This assignment is determined by whether the slave device returns a confirmation (ACK) signal, enabling the next address allocation. Slave devices can also obtain unique device addresses through this allocation process. Therefore, with this invention's serial communication bus system and control method featuring dynamic address assignment, existing I2C bus signals can dynamically assign device addresses, facilitating the identification of a plurality of slave devices and preventing address conflicts among them, thereby improving communication transmission.