Abstract:
A circuit includes a first n-bit communications block and a second m-bit communications block. A controller is configured to control mode of operation for the first and second communications blocks. In a first mode, the first and second communications blocks function as a single communications block for n+m bit communications. In a second mode, the first and second communications blocks operate as substantially independent communications block for n bit communications and m bit communications.
Abstract:
Transmission/reception device for signals having a wavelength of the microwaves, millimeter or terahertz type, comprising an antenna array. The antenna array comprises a first group of first omni-directional antennas and a second group of second directional antennas disposed around the first group of antennas.
Abstract:
A device includes two electrically conductive rods to couple to connection terminals of a battery cell of a battery, with a force tending to squeeze the electrically conductive rods together. The device includes an insulating block to keep the electrically conductive rods from making electrical contact with each other. An insulating block disable element disables the insulating block in response to a control signal generated by a disable element controller. The disable element controller monitors at least one operating state signal of the cell, and generates the control signal based on the monitoring, allowing the rods to come into electrical contact and short-circuit the battery cell.
Abstract:
A memory circuitry includes memory components operable in response to first edges of an internal clock; and internal clock generating circuitry to generate the internal clock in response to a system clock, wherein the first edges of the internal clock are generated in response to both a rising and a falling edge of the system clock.
Abstract:
The electronic device comprises a first terminal and a second terminal, a buffer connected between the first terminal and the second terminal and comprising a signal input, and means for protecting against electrostatic discharges likely to occur across at least a pair of nodes of the buffer. The device comprises at least one integrated structure connected between the two nodes and said signal input, containing at least one MOS transistor and forming both said protection means and at least a part of said buffer.
Abstract:
A simulation model is for an optical modulator that may include an optical phase shifter in a semiconductor material structure between two sections of an optical waveguide. The semiconductor material structure may include one of a P-N and P-I-N junction in a plane parallel to an axis of the optical waveguide. The model may include a diode configured to characterize an electrical behavior of the one of the P-N and P-I-N junction such that a change in a global refractive index of the optical phase shifter is expressed, by a coefficient, based upon an amount of charges in the one of the P-N and P-I-N junctions and raised to a power. The coefficient and the power may be empirical values based upon the semiconductor material and a wavelength.
Abstract:
A motion estimation method and device are provided for processing images to be inserted, between a preceding original image and a following original image, into a sequence of images. Each image is divided into pixel blocks associated with motion vectors. For a current block of an image being processed, motion vectors associated with blocks of the image being processed and/or associated with blocks of a processed image are selected. Candidate vectors are generated from selected motion vectors. An error is calculated for each candidate vector. A penalty is determined for a subset of candidate vectors on the basis of the values of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block and/or on the basis of the values of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block.
Abstract:
A first assembly of critical cells is to be monitored. An equivalent capacitance of output cells coupled to the critical path is determined. Logic level inputs of the critical cells for signal propagation are also determined. A second assembly of control logic cells is provided which copies the first assembly in terms of number of cells, type of cells and cell connection such that each of the control cells is a homolog of a corresponding critical cell. Charge cells are provided at the outputs of the control cells having an equivalent capacitance in accordance with the determined capacitance of the output cells. For each control cell, logic levels are asserted in accordance with the determined configuration of the critical path. A signal generator applies a signal the input of the second assembly and a signal receiver is coupled to the output of the second assembly.
Abstract:
An image sensor having a semiconductor substrate, at least two photosites in the substrate and an isolation region between the photosites. The isolation region has a first trench covered by a thin electrically insulating liner and filled with an electrically conductive material, the conductive material has a second trench at least partially filled with an optically isolating material.
Abstract:
The electric behavior of a reverse-biased PN junction diode is modeled by measuring the value of voltage V present across the diode and the value of the corresponding current I running through this diode, the voltage V varying within a range of values including the value of diode breakdown voltage. A representation of a function ln ( I - I s ) according to voltage V is established from the measured values of current I and of voltage V, IS being the saturation current of the diode. A linear function representative of a substantially linear portion of the function, characterized by voltages V greater than breakdown voltage VBK in terms of absolute value, is determined. An avalanche multiplication factor MM is then calculated by MM = 1 + ( - slbv · V + bv bv ) , with parameter slbv equal to the ordinate at the origin of the linear function, and parameter slbv/bv equal to the slope of the linear function.