公开(公告)号：US20250040842A1

公开(公告)日：2025-02-06

申请号：US18364275

申请日：2023-08-02

Applicant: STMicroelectronics International N.V.

Inventor： Nicola PICOZZI ,  Alessandro GUMIERO ,  Marco ODONI ,  Luigi DELLA TORRE ,  Daniele PAPARELLO

IPC: A61B5/1455 ,  A61B5/00

Abstract: An example method, apparatus, and pulse oximeter device for determining a blood oxygen saturation value in a subject are provided. The example apparatus may include a light source configured to emit monochrome light of a single emitted wavelength. The light source may be positioned to direct the monochrome light at a portion of a subject. The example apparatus may further include a light sensing diode configured to receive an unabsorbed portion of the monochrome light. The apparatus may also include a controller configured to determine a blood oxygen saturation value based on one or more characteristics of the unabsorbed portion of the monochrome light comprising light of the single emitted wavelength.

公开(公告)号：US20250038670A1

公开(公告)日：2025-01-30

申请号：US18225955

申请日：2023-07-25

Applicant: STMicroelectronics International N.V.

Inventor： Stefano PERROTTA ,  Salvatore Giuseppe PRIVITERA ,  Francesco PULVIRENTI

IPC: H02M3/335 ,  H02M1/00

Abstract: A DC-DC converter includes a primary-side control-circuit having an oscillator driving a transformer in response to assertion of a PWM-signal to transmit power from the primary to the secondary and ceasing in response to deassertion of the PWM-signal, and a receiver demodulator circuit receiving/demodulating a feedback signal sent from the secondary to the primary by comparing an instantaneous value of an envelope indicative of voltages at the primary-coil to an average-value of the envelope to produce a reset-signal. A PWM circuit asserts the PWM-signal in response to a set-signal and deasserts the PWM-signal in response to assertion of the reset-signal. A secondary-side control-circuit rectifies the received power, asserts an intermediate feedback-signal if feedback indicative of the output voltage is greater than a reference-voltage, and connects a capacitance between the secondary and ground in response to assertion of the intermediate feedback-signal to modulate and send the feedback to the primary.

公开(公告)号：US20250036428A1

公开(公告)日：2025-01-30

申请号：US18783054

申请日：2024-07-24

Applicant: STMicroelectronics International N.V.

Inventor： Frederic RUELLE ,  Yohann MARTINIAULT ,  Bechir JABRI ,  Maher MASTOURI ,  Laurent MEUNIER ,  Emmanuel GRANDIN ,  Maxime DORTEL

IPC: G06F9/445 ,  G06F3/0482

Abstract: Content is generated for a programmable computing device based on user-selected configuration information. The user-selected configuration information includes a user-selected versatile component. User-selectable versatile component configuration options for the user-selected versatile component are presented and versatile component configuration option selections for the user-selected versatile component are received. Settings for an instance of the user-selected versatile component are generated based on the received component configuration option selections. A configuration store is generated or updated based on the settings for the user-selected versatile component. Content for the programmable computing device is generated based on the configuration store. Generating the content includes associating the instance of the user-selected versatile component with a software component, with a hardware component, or combinations thereof, based on one or more of the received versatile component configuration option selections. The generated content is provided to the programmable computing device.

公开(公告)号：US12212318B2

公开(公告)日：2025-01-28

申请号：US18098421

申请日：2023-01-18

Applicant: STMicroelectronics International N.V.

Inventor： Sandeep Kaushik ,  Paras Garg

IPC: H03K19/0185 ,  H03K17/687 ,  H03K19/017

Abstract: A Low Voltage Differential Signaling (LVDS) transmitter includes driver circuit with a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, and a second resistor. The first transistor is coupled between a first node and first output. The second transistor is coupled between the first node and a second output. The third transistor is coupled between the first output and a second node. The fourth transistor is coupled between the second output and the second node. The first resistor is coupled between the first output and a common mode node. The second resistor is coupled between the second output and the common mode node. A pre-driver circuit generates gate control signals controlling the first, second, third, and fourth transistors in response to a data signal. A controlled timing delay is applied to the timing of logic state transistors for the control signals.

公开(公告)号：US12212228B2

公开(公告)日：2025-01-28

申请号：US17685689

申请日：2022-03-03

Applicant: STMicroelectronics International N.V.

Inventor： Akshat Jain

IPC: H05B45/355 ,  H02M1/08 ,  H02M1/42 ,  H05B45/18 ,  H05B45/375 ,  H05B45/44 ,  H02M1/00

Abstract: A method includes receiving a plurality of digital feedback signals from a voltage converter, controlling the voltage converter based upon a user desired brightness level and the plurality of digital feedback signals, the voltage converter receiving input from a DC voltage bus and providing output to drive a lighting load, and receiving a plurality of feedback signals from a power factor correction circuit that receives a rectified mains voltage and provides output to the DC voltage bus, and based thereupon operating the power factor correction circuit in transition mode or discontinuous mode based upon the user desired brightness level and a threshold brightness. The plurality of feedback signals include an input sense signal that is a function of the rectified mains voltage as drawn by the power factor correction circuit and an output sense signal that is a function of the output provided to the DC voltage bus.

公开(公告)号：US12211832B2

公开(公告)日：2025-01-28

申请号：US17504293

申请日：2021-10-18

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Vishal Kumar Sharma

IPC: H01L27/02 ,  H01L29/417 ,  H01L29/739

Abstract: A diode and method of design the layout of the same having reduced parasitic capacitance is disclosed. In particular, the diode for providing fast response protection of an RF circuit from a high power noise event, such as an ESD, voltage spike, power surge or other noise is disclose. The parasitic capacitance in disclosed circuit is a greatly reduced compared to the prior art, thus significantly increasing the speed of the response to dissipate all high power noise events.

公开(公告)号：US20250030417A1

公开(公告)日：2025-01-23

申请号：US18224370

申请日：2023-07-20

Applicant: STMicroelectronics International N.V.

Inventor： Federico FARY ,  Sandro ROSSI ,  Niccolò BRAMBILLA ,  Giovanni SICURELLA

IPC: H03K17/687

Abstract: A startup circuit includes a first circuit leg coupled between an input node and an output node and a second circuit leg coupled between the input node and the output node. The first circuit generates a first current and the second circuit leg sinks current from a first node based upon the first current. A third circuit leg is coupled between the input node and the output node and sources current to a second node based upon a voltage at the first node to thereby generate a feedback voltage at the second node. The first circuit leg increases the first current based upon the feedback voltage, in turn increasing the current sunk from the first node by the second circuit leg and increasing the current sourced to the second node by the third circuit leg to thereby generate a startup current at the output node.

公开(公告)号：US20250028344A1

公开(公告)日：2025-01-23

申请号：US18770761

申请日：2024-07-12

Applicant: STMicroelectronics International N.V.

Inventor： Alessandra FARINA ,  Roberto Pio BAORDA ,  Stefano RAMORINI

IPC: G05F1/575 ,  G05F1/565

Abstract: An LDO regulator has a pass device arranged between an input node and an output node. The pass device is controlled at a control node by an error amplifier. A first current generator sources compensation current to the control node, a cascode device is arranged between the control node and a compensation node, and a second current generator sinks compensation current from the compensation node. A compensation capacitor is arranged between the output and compensation nodes. Load current through the pass device is sensed to generate a feedback current at a first feedback node. An input branch of a current mirror receives the feedback current. A filtering circuit is coupled between a control terminal of the input branch and a second feedback node. Output branches of the current mirror sink and source additional compensation current from the compensation node and the control node, respectively, proportional to the feedback current.

公开(公告)号：US20250027985A1

公开(公告)日：2025-01-23

申请号：US18752038

申请日：2024-06-24

Applicant: STMicroelectronics International N.V.

Inventor： Emanuele Moretti ,  Mauro Foppiani

IPC: G01R31/27 ,  G01R31/00 ,  G01R31/26 ,  G01R31/30 ,  G01R31/52

Abstract: A test circuit includes a set of electronic switches having a current path between a first node and a ground node, where each electronic switch has a respective control node. A set of coupling channels have one end coupled to a common test node and other ends coupled to the respective control nodes of electronic switches. A stress voltage supply source is coupled to the common test node. A set of comparator circuits includes comparator circuits having a first input node coupled, via sensing circuitry, to the control node of respective electronic switches in the set of electronic switches and having second nodes coupled to a threshold voltage node. A method of operating the test circuit is also disclosed.

公开(公告)号：US20250027970A1

公开(公告)日：2025-01-23

申请号：US18353678

申请日：2023-07-17

Applicant: STMicroelectronics International N.V.

Inventor： Stefano Paolo Rivolta ,  Federico Rizzardini ,  Lorenzo Bracco ,  Marco Bianco ,  Tae-gil Kang

IPC: G01P15/08

Abstract: According to an embodiment, a sensor including a machine learning core (MLC) and a finite state machine (FSM) circuit for detecting a shock event is provided. The MLC continuously calculates a value based on the change in velocity. The FSM circuit compares the value to a first threshold and generates a first interrupt if it is greater than the first threshold. The FSM circuit then compares the value to a second threshold less than the first threshold and generates a second interrupt if it is less than or equal to the second threshold after the first interrupt. The MLC calculates a maximum value between the first and second interrupts and stores it in a register, which is read by an application processor of a host device after receiving the second interrupt. The maximum acceleration norm value is reset after a delay after the second interrupt is generated.