公开(公告)号：US07170701B2

公开(公告)日：2007-01-30

申请号：US10179356

申请日：2002-06-25

Applicant: Jan Mulder ,  Hugo Veenstra ,  Giuseppe Grillo

Inventor： Jan Mulder ,  Hugo Veenstra ,  Giuseppe Grillo

IPC: G11B5/09

CPC classification number: G11B5/02 ,  G11B5/012 ,  G11B2005/0013 ,  H03F1/02 ,  H03F3/3432 ,  H03F3/4508 ,  H03F2203/45352

Abstract: The present invention relates to an amplifier intended to deliver to a load impedance RL connected between two output terminals of the amplifier an output current Iout which is representative of an input signal (Vin, −Vin) applied to two input terminals of the amplifier, which amplifier includes a first and a second transistor T1 and T2 connected as a differential pair around the load impedance RL. The amplifier according to the invention further includes a third and a fourth transistor T3 and T4 which form a differential pair; degenerated by means of a degenerating impedance Req which has a nominal value equal to that of the load impedance RL of the amplifier, which differential pair (T3, T4) is intended to be controlled by means of a control signal (−Vin/2, Vin/2), in anti-phase with the input signal (Vin, −Vin). The invention permits to double the output current Iout of the amplifier without, however, increasing its power consumption.

Abstract translation: 本发明涉及一种放大器，其用于传送到连接在放大器的两个输出端之间的负载阻抗RL，该输出电流Iout表示施加到放大器的两个输入端的输入信号（Vin，-Vin） 放大器包括作为负载阻抗RL周围的差分对连接的第一和第二晶体管T 1和T 2。 根据本发明的放大器还包括形成差分对的第三和第四晶体管T 3和T 4; 通过衰减阻抗Req退化，该衰减阻抗Req的标称值等于放大器的负载阻抗RL的额定值，该差分对（T 3，T 4）将通过控制信号（-Vin / 2，Vin / 2），与输入信号（Vin，-Vin）反相。 本发明允许放大器的输出电流Iout加倍，而不增加其功率消耗。

公开(公告)号：US20060164126A1

公开(公告)日：2006-07-27

申请号：US11038388

申请日：2005-01-21

Applicant: Jan Mulder ,  Franciscus van der Goes ,  Marcel Lugthart

Inventor： Jan Mulder ,  Franciscus van der Goes ,  Marcel Lugthart

IPC: G01R19/00

CPC classification number: G01R19/16519 ,  G01R19/16557 ,  H03K3/356139 ,  H03K5/2481 ,  H03K5/249 ,  H03M1/0604

Abstract: A differential comparator with improved bit-error rate performance operating with a low supply voltage. The differential comparator includes a first pair of transistors receiving a differential input. A second pair of transistors is coupled to the first pair of transistors. A pair of resistive elements is connected between the first pair and second pair of transistors so as to increase bias currents shared by the first and second pairs of transistors. The increased bias currents reduce a time required by the differential comparator to transition from a meta-stable state to a stable state, thereby improving a bit-error rate of the differential comparator. The resistive elements can use linear resistors or transmission gates. Gates of either the first or second pair of transistors can provide an output.

Abstract translation: 差分比较器，具有更低的电源电压，具有改进的误码率性能。 差分比较器包括接收差分输入的第一对晶体管。 第二对晶体管耦合到第一对晶体管。 一对电阻元件连接在第一对和第二对晶体管之间，以增加由第一和第二对晶体管共享的偏置电流。 增加的偏置电流减少差分比较器从元稳定状态转变到稳定状态所需的时间，从而提高差分比较器的误码率。 电阻元件可以使用线性电阻或传输门。 第一或第二对晶体管的栅极可以提供输出。

公开(公告)号：US20050244796A1

公开(公告)日：2005-11-03

申请号：US11084432

申请日：2005-03-18

Applicant: Jan Mulder ,  Adriaan Beukers ,  Max Baarspul ,  Michael Johannes van Tooren ,  Stefaan Emiel de Winter

Inventor： Jan Mulder ,  Adriaan Beukers ,  Max Baarspul ,  Michael Johannes van Tooren ,  Stefaan Emiel de Winter

IPC: G09B9/04 ,  G09B9/02

CPC classification number: G09B9/04

Abstract: A motion simulator provided with a movable housing, preferably carried by a number of length-adjustable legs, in which housing projection means are arranged for visual information supply, while in the housing a control environment of a motion apparatus to be simulated is situated, the control environment being incorporated in a removable unit, which unit is exchangeable for another, comparable unit having a different control environment to be simulated.

Abstract translation: 一种运动模拟器，其具有可移动的壳体，优选地由许多长度可调节的腿部承载，其中壳体突出装置设置用于视觉信息供给，而在壳体中，要被模拟的运动装置的控制环境位于， 控制环境被结合在可移动单元中，该单元可交换为具有不同控制环境的另一可比单元。

公开(公告)号：US20050068216A1

公开(公告)日：2005-03-31

申请号：US10926407

申请日：2004-08-26

Applicant: Jan Mulder ,  Franciscus Maria Leonardus Goes ,  Jan Westra ,  Rudy Plassche

Inventor： Jan Mulder ,  Franciscus Maria Leonardus Goes ,  Jan Westra ,  Rudy Plassche

IPC: H03K17/041 ,  H03M1/06 ,  H03M1/14 ,  H03M1/20 ,  H03M1/36 ,  H03M1/78

CPC classification number: H03K17/04106 ,  H03M1/204 ,  H03M1/365

Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.

Abstract translation: 电压内插电路包括连接在地和电压输入端之间的电阻梯形电阻，并具有多个电阻器，电阻器之间具有电压抽头。 放大器（可选地）具有在其相应的第一端子和放大器的输入端连接在一起的第一和第二电容器。 第一多个开关将各个抽头连接到第一电容器的第二端子。 第二多个开关将各个抽头连接到第二电容器的第二端子。 通过控制第一和第二多个开关来内插输出电压。

公开(公告)号：US20050035810A1

公开(公告)日：2005-02-17

申请号：US10953420

申请日：2004-09-30

Applicant: Jan Mulder ,  Franciscus Maria Leonardus van der Goes

Inventor： Jan Mulder ,  Franciscus Maria Leonardus van der Goes

IPC: H03M1/36 ,  H03M1/12

CPC classification number: H03K17/002 ,  H03K17/145 ,  H03M1/36 ,  H03M1/365

Abstract: A differential multiplexer includes a plurality of multiplexing circuits. Each multiplexing circuit inputs a corresponding differential input signal including a positive input signal and a negative input signal, and outputs positive and negative output signals. Each multiplexing circuit includes first, second, third and fourth transistors. The first and second transistors input the positive input signal. The third and fourth transistors input the negative input signal. Outputs of the first and third transistors are connected to the positive output signal. Outputs of the second and fourth transistors are connected to the negative output signal. The positive and negative output signals are controlled using gate voltages on the first and fourth transistors. The second and third transistors are turned off when the differential multiplexer is in use. The transistors are cross-coupled to make leakage between the positive and negative input signals common mode in the positive and negative output signals.

Abstract translation: 差分多路复用器包括多个复用电路。 每个复用电路输入包括正输入信号和负输入信号的对应差分输入信号，并输出正和负输出信号。 每个复用电路包括第一，第二，第三和第四晶体管。 第一和第二晶体管输入正输入信号。 第三和第四晶体管输入负输入信号。 第一和第三晶体管的输出端连接到正输出信号。 第二和第四晶体管的输出端连接到负输出信号。 正和负输出信号通过第一和第四晶体管上的栅极电压来控制。 当使用差分多路复用器时，第二和第三晶体管截止。 晶体管交叉耦合以在正输入信号和负输出信号中的正输入信号和负输入信号共模之间产生泄漏。

公开(公告)号：US4823337A

公开(公告)日：1989-04-18

申请号：US99268

申请日：1987-09-21

Applicant: Pieter Van Zanten ,  Evert-Jan Mulder

Inventor： Pieter Van Zanten ,  Evert-Jan Mulder

IPC: G11B17/032 ,  G11B17/028 ,  G11B17/02 ,  G01D15/32 ,  G11B25/04

CPC classification number: G11B17/0284 ,  G11B17/054

Abstract: Clamping device (21) for clamping an optical disc on a turntable comprises a disc-pressure means (23), a support (5) for the disc-pressure means, which support is movable between an operating position and a rest position, and a permanent-magnet system comprising a first axially magnetized annular magnet (31) and a second axially magnetized magnet (29) secured to the support and to the disc-operating means respectively. In the operating position of the support the disc-pressure means is pressed against the disc on the turntable by magnetic force and the disc-pressure means is freely rotatable relative to the support. The permanent magnets are positioned coaxially relative to each other, a radial air gap (33) being formed between the first magnet (31) and the second magnet (29) in the operating position of the support.

公开(公告)号：US4082138A

公开(公告)日：1978-04-04

申请号：US607793

申请日：1975-08-26

Applicant: Andries Rinse Miedema ,  Kurt Heinz Jurgen Buschow ,  Jan Mulder

Inventor： Andries Rinse Miedema ,  Kurt Heinz Jurgen Buschow ,  Jan Mulder

IPC: C09K5/00 ,  C09K5/08 ,  C22C28/00 ,  F02G1/044 ,  F25B9/00 ,  F28D17/00 ,  F28F21/00 ,  F28F23/00 ,  H01F1/01

CPC classification number: H01F1/015 ,  C22C28/00 ,  F02G1/0445 ,  F25B9/004 ,  F28D17/00 ,  F28F21/00 ,  F02G2250/18 ,  F25B2309/003 ,  Y10S165/009

Abstract: A filling mass for low-temperature regenerators comprising one or more of the compounds of the formula A.sub.1-x B.sub.x Rh.sub.1-y X.sub.y, wherein A = Sm, Gd, Tb, Dy or a mixture thereof, wherein B = Ho, Er, Tm, Yb or a mixture thereof, wherein X = Cu, Zn, Ru, Pd, Ag, Re, Os, Ir, Pt, Au or a mixture thereof, and wherein 0.ltoreq..times..ltoreq.1 and 0.ltoreq.y

公开(公告)号：US4034804A

公开(公告)日：1977-07-12

申请号：US596020

申请日：1975-07-16

Applicant: Roelf Jan Meijer ,  Jan Mulder

Inventor： Roelf Jan Meijer ,  Jan Mulder

IPC: F28D1/053 ,  F28D1/04

CPC classification number: F28D1/05366 ,  F28D2001/0266

Abstract: A radiator operable with a flow of air for cooling a quantity of water and formed as zig-zag walls, each of which comprises air ducts of predetermined ratio of flow length to hydraulic diameter.

Abstract translation: 散热器，其可用空气流操作，用于冷却一定数量的水并形成为之字形壁，每个壁包括具有预定比例的流动长度与液压直径的风道。

公开(公告)号：US08986453B2

公开(公告)日：2015-03-24

申请号：US12664648

申请日：2008-06-13

Applicant: Johannes Käppeler ,  Adam Boyd ,  Victor Saywell ,  Jan Mulder ,  Olivier Feron

Inventor： Johannes Käppeler ,  Adam Boyd ,  Victor Saywell ,  Jan Mulder ,  Olivier Feron

IPC: B05C11/00 ,  C23C16/458 ,  C23C16/46 ,  C30B25/12 ,  H01L21/687

CPC classification number: C23C16/4586 ,  C23C16/4583 ,  C23C16/46 ,  C30B25/12 ,  H01L21/68735

Abstract: The invention relates to a device for coating substrates having a process chamber (1) disposed in a reactor housing and a two-part, substantially cup-shaped susceptor (2, 3) disposed therein, forming an upper susceptor part (2) with the cup floor thereof having a flat plate (2′) and a lower susceptor part (3) with the cup side walls thereof, the outer side (4) of the plate (2′) of the upper susceptor part (2) facing upwards toward the process chamber (1) and forming a contact surface for at least one substrate, the upper susceptor part (2) contacting a front edge (3″) of the lower susceptor part (3) at the edge of said upper susceptor part (2), the lower susceptor part (3) being supported by a susceptor carrier (6), and heating zones (A, B, C) for heating the upper susceptor part (2) being disposed below the plate (2′). An advantageous refinement of the invention proposes that the upper susceptor part (2) be removable from the process chamber (1) separately from the lower susceptor part (3), and the joint (30) between the edge of the upper susceptor part (2) and the front edge (3″) of the lower susceptor part (3) be formed as a heat conduction barrier.

Abstract translation: 本发明涉及一种用于涂覆基材的装置，其具有设置在反应器壳体中的处理室（1）和设置在反应器壳体中的两部分基本杯形基座（2,3），形成上基座部分（2），其中 其底板具有平板（2'）和具有杯侧壁的下基座部分（3），上托架部分（2）的板（2'）的外侧（4）朝向 所述处理室（1）并且形成用于至少一个基板的接触表面，所述上基座部分（2）在所述上基座部分（2）的边缘处接触所述下基座部分（3）的前边缘（3“）， ），下感受器部分（3）由基座托架（6）支撑，加热区（A，B，C）用于加热设置在板（2'）下方的上基座部分（2）。 本发明的有益改进提出，上基座部分（2）可以与下基座部分（3）分离地从处理室（1）移除，并且上基座部分（2）的边缘之间的接头（30） ）和下基座部（3）的前缘（3“）形成为导热屏障。

公开(公告)号：US07616144B2

公开(公告)日：2009-11-10

申请号：US11857417

申请日：2007-09-18

Applicant: Jan Mulder ,  Franciscus Maria Leonardus van der Goes ,  Jan Westra ,  Rudy van der Plassche

Inventor： Jan Mulder ,  Franciscus Maria Leonardus van der Goes ,  Jan Westra ,  Rudy van der Plassche

IPC: H03M1/78

CPC classification number: H03K17/04106 ,  H03M1/204 ,  H03M1/365

Abstract: A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first terminals and to an input of the amplifier. A first plurality of switches connect respective taps to a second terminal of the first capacitor. A second plurality of switches connect the respective taps to a second terminal of the second capacitor. An output voltage is interpolated by controlling the first and second pluralities of switches.

Abstract translation: 电压内插电路包括连接在地和电压输入端之间的电阻梯形电阻，并具有多个电阻器，电阻器之间具有电压抽头。 放大器（可选地）具有在其相应的第一端子和放大器的输入端连接在一起的第一和第二电容器。 第一多个开关将各个抽头连接到第一电容器的第二端子。 第二多个开关将各个抽头连接到第二电容器的第二端子。 通过控制第一和第二多个开关来内插输出电压。