公开(公告)号：US20130264609A1

公开(公告)日：2013-10-10

申请号：US13636127

申请日：2012-05-16

申请人： Zengfeng Di ,  Jiantao Bian ,  Miao Zhang ,  Xi Wang

发明人： Zengfeng Di ,  Jiantao Bian ,  Miao Zhang ,  Xi Wang

IPC分类号： H01L29/66 ,  H01L29/778

CPC分类号： H01L29/66431 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02664 ,  H01L21/28264 ,  H01L21/8258 ,  H01L21/84 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/78

摘要： The present invention provides a semiconductor structure with a hybrid of Ge and a group III-V material coplanar and a preparation method thereof. A heterogeneously integrated semiconductor structure with Ge and a group III-V semiconductor material coplanar includes at least one Ge substrate formed on a bulk silicon substrate, and the other substrate is the group III-V semiconductor material formed on the Ge semiconductor. The preparation method includes: preparing a Ge semiconductor layer on a bulk silicon substrate; preparing a group III-V semiconductor material layer on the Ge semiconductor layer; performing first photolithography and etching to make a patterned window to a Ge layer so as to form a recess; preparing a spacer in the recess; preparing a Ge film through selective epitaxial growth; performing chemical mechanical polishing to obtain a heterogeneously integrated semiconductor structure with a hybrid of Ge and the group III-V semiconductor material coplanar; removing the spacer and a defect part of the Ge layer close to the spacer; implementing isolation between Ge and the group III-V semiconductor material; and preparing a high performance CMOS device including a Ge channel PMOS and a group III-V channel NMOS by forming an MOS structure.

摘要翻译： 本发明提供了具有Ge和III-V族III族材料共面的混合物的半导体结构及其制备方法。 具有Ge和III-V族半导体材料共面的非均匀集成半导体结构包括形成在体硅衬底上的至少一个Ge衬底，而另一衬底是形成在Ge半导体上的III-V族半导体材料。 制备方法包括：在体硅衬底上制备Ge半导体层; 在Ge半导体层上制备III-V族III族半导体材料层; 进行第一光刻和蚀刻，以将图案化的窗口制成Ge层以形成凹部; 在凹槽中制备间隔物; 通过选择性外延生长制备Ge膜; 进行化学机械抛光以获得具有Ge和III-V族半导体材料共面的杂化物的非均匀集成的半导体结构; 去除间隔物和接近间隔物的Ge层的缺陷部分; 实现Ge与III-V族III族半导体材料之间的隔离; 以及通过形成MOS结构来制备包括Ge沟道PMOS和III-V族沟道NMOS的高性能CMOS器件。

公开(公告)号：US08264042B2

公开(公告)日：2012-09-11

申请号：US12810574

申请日：2010-02-11

申请人： Deyuan Xiao ,  Xi Wang ,  Miao Zhang ,  Jing Chen ,  Zhong Ying Xue

发明人： Deyuan Xiao ,  Xi Wang ,  Miao Zhang ,  Jing Chen ,  Zhong Ying Xue

IPC分类号： H01L27/12

CPC分类号： H01L29/78696 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L29/42392

摘要： A hybrid orientation accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Si(110) and n-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device results in high carrier mobility. Meanwhile polysilicon gate depletion and short channel effects are prevented, and threshold voltage is increased.

摘要翻译： 混合取向累积模式GAA（Gate-All-Around）CMOSFET包括具有第一通道的PMOS区域，具有第二通道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Si（110）和n型Si（100）形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 根据本发明的装置结构相当简单，紧凑且高度集成。 在积累模式中，电流流过整个跑道状通道。 所公开的装置导致高载流子迁移率。 同时防止多晶硅栅极耗尽和短沟道效应，并且阈值电压增加。

公开(公告)号：US20120164003A1

公开(公告)日：2012-06-28

申请号：US13405347

申请日：2012-02-26

申请人： Xiang LIU ,  Ping LU ,  Miao ZHANG

发明人： Xiang LIU ,  Ping LU ,  Miao ZHANG

IPC分类号： F04D29/40 ,  F04D25/02

CPC分类号： F04D13/06 ,  F04D25/0606 ,  F04D25/082 ,  F04D29/603 ,  F04D29/668

摘要： A blower fan including a motor having a rotating shaft, a bracket, a fan housing having a cavity, a fan wheel, and fan blades. The motor is disposed on the fan housing via the bracket. An extended portion of the rotating shaft extends into the cavity of the fan housing and connects with the fan wheel. The fan blades are disposed on the rotating shaft and between the motor and the fan housing. On the casing of the motor is disposed with air vents. The bracket forms an annular side wall. A cavity is formed inside the annular side wall. The annular side wall is outfitted with air outlets which are connected with the cavity of the annular side wall and the fan blades are disposed in the cavity.

摘要翻译： 一种风扇，包括具有旋转轴的电动机，支架，具有空腔的风扇壳体，风扇叶轮和风扇叶片。 电机通过支架设置在风扇外壳上。 旋转轴的延伸部分延伸到风扇壳体的空腔中并与风扇轮连接。 风扇叶片设置在旋转轴上以及电动机和风扇壳体之间。 在电机的外壳上配有通气孔。 支架形成环形侧壁。 在环形侧壁内形成空腔。 环形侧壁配有与环形侧壁的空腔连接的空气出口，风扇叶片设置在空腔中。

公开(公告)号：US20110254100A1

公开(公告)日：2011-10-20

申请号：US12810648

申请日：2010-02-11

申请人： Deyuan Xiao ,  Xi Wang ,  Miao Zhang ,  Jing Chen ,  Zhongying Xue

发明人： Deyuan Xiao ,  Xi Wang ,  Miao Zhang ,  Jing Chen ,  Zhongying Xue

IPC分类号： H01L27/092

CPC分类号： H01L21/845 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/1211 ,  H01L29/42392 ,  H01L29/78696

摘要： A Ge and Si hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Ge and n-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device has high carrier mobility, high device drive current, and maintains the electrical integrity of the device. Meanwhile, polysilicon gate depletion and short channel effects are prevented.

摘要翻译： Ge和Si混合材料堆积模式GAA（Gate-All-Around）CMOSFET包括具有第一沟道的PMOS区域，具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Ge和n型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在积累模式中，电流流过整个跑道状通道。 所公开的器件具有高的载流子迁移率，高的器件驱动电流，并且保持器件的电气完整性。 同时，防止了多晶硅栅极耗尽和短沟道效应。