公开(公告)号：US08773182B1

公开(公告)日：2014-07-08

申请号：US13756670

申请日：2013-02-01

申请人： Ofir Degani ,  Ashoke Ravi ,  Hasnain Lakdawala ,  Rotem Banin

发明人： Ofir Degani ,  Ashoke Ravi ,  Hasnain Lakdawala ,  Rotem Banin

IPC分类号： H03L7/06

CPC分类号： H03L7/085 ,  G04F10/005 ,  H03L2207/50

摘要： A stochastic beating time-to-digital converter (TDC) can include triggered ring oscillator (TRO) and a stochastic TDC (sTDC). The TRO, when triggered by a reference signal edge, can generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The TRO period can be greater than or less than the VCO period by the specified ratio. The sTDC with an event triggered memory can include an sTDC component with a plurality of groups of latches. Each group of latches can be configured to sample and store a VCO state at an edge of a TRO signal. The sTDC component can trigger a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge.

摘要翻译： 随机抖动时间 - 数字转换器（TDC）可以包括触发环形振荡器（TRO）和随机TDC（sTDC）。 当由参考信号沿触发时，TRO可以产生具有作为压控振荡器（VCO）周期的选定比率的TRO周期的周期性TRO信号。 TRO周期可以大于或小于VCO周期的指定比率。 具有事件触发的存储器的sTDC可以包括具有多组锁存器的sTDC组件。 每组锁存器可以配置为在TRO信号的边沿采样和存储VCO状态。 当锁存器组中的一个锁存器转变为被称为过渡沿的不同数字状态时，sTDC组件可以触发锁存器组的选定数量的VCO状态的捕获。

公开(公告)号：US20140176368A1

公开(公告)日：2014-06-26

申请号：US13721245

申请日：2012-12-20

申请人： Telesphor Kamgaing ,  Valluri R. Rao ,  Ofir Degani

发明人： Telesphor Kamgaing ,  Valluri R. Rao ,  Ofir Degani

IPC分类号： H01Q1/38 ,  H01P11/00

CPC分类号： H01Q9/045 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01P11/00 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q1/526 ,  H01Q21/0006 ,  Y10T29/49018

摘要： Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include forming a package structure comprising a discrete antenna disposed on a back side of a device, wherein the discrete antenna comprises an antenna substrate, a through antenna substrate via vertically disposed through the antenna substrate. A through device substrate via that is vertically disposed within the device is coupled with the through antenna substrate via, and a package substrate is coupled with an active side of the device.

摘要翻译： 描述了形成微电子封装结构的方法及由此形成的相关结构。 这些方法和结构可以包括形成包括设置在设备的背侧的分立天线的封装结构，其中分立天线包括天线基板，通过天线基板垂直设置的通过天线基板。 垂直设置在器件内的穿通器件衬底通孔经由天线衬底与封装衬底耦合，并且封装衬底与器件的有源侧耦合。

公开(公告)号：US20120129468A1

公开(公告)日：2012-05-24

申请号：US12949008

申请日：2010-11-18

申请人： Tzvi Maimon ,  Ofir Degani

发明人： Tzvi Maimon ,  Ofir Degani

IPC分类号： H04B1/38

CPC分类号： H04B1/48 ,  H04B1/0458 ,  H04B1/18 ,  H04B1/44 ,  H04W88/06

摘要： An apparatus comprises a transmit network to transmit an input from a first amplifier to an antenna, a receive network to provide an input from an antenna to a second amplifier, a first switch to selectively decouple the transmit network from the antenna, and a second switch to selectively decouple the receive network from the antenna. Other embodiments may be described.

摘要翻译： 一种装置包括：传输网络，用于将输入从第一放大器传输到天线;接收网络，用于提供从天线到第二放大器的输入;第一开关，用于选择性地将发射网络与天线分离;以及第二开关 以选择性地将接收网络与天线分离。 可以描述其他实施例。

公开(公告)号：US20090322427A1

公开(公告)日：2009-12-31

申请号：US12164219

申请日：2008-06-30

申请人： Ofir Degani ,  Mark Ruberto

发明人： Ofir Degani ,  Mark Ruberto

IPC分类号： H03F3/45

CPC分类号： H03F3/45188 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6638 ,  H01L2223/6644 ,  H01L2223/6655 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03F3/195 ,  H03F3/245 ,  H03F2203/45386 ,  H03F2203/45464 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.

摘要翻译： 一种用于提高放大器性能的集成CMOS功率放大器系统，包括多个差分主放大器核心，多个接地焊盘以及将多个差分主放大器核连接到多个接地焊盘的多条路线的集成CMOS功率放大器系统 接地垫 每个差分主放大器核心包括一对并置的主放大器核心晶体管。 每个接地焊盘连接到差分主放大器核心的子集。 集成CMOS功率放大器系统的实施例减小对地的寄生电感，并增加集成CMOS功率放大器系统的跨导和放大，从而提高性能。

公开(公告)号：US07576621B2

公开(公告)日：2009-08-18

申请号：US11823856

申请日：2007-06-28

申请人： Hasnain Lakdawala ,  Ofir Degani ,  Ashoke Ravi ,  Masoud Sajadieh ,  Soumyanath Krishnamurthy

发明人： Hasnain Lakdawala ,  Ofir Degani ,  Ashoke Ravi ,  Masoud Sajadieh ,  Soumyanath Krishnamurthy

IPC分类号： H03L1/00

CPC分类号： H03L1/026 ,  H03L7/1974

摘要： Film bulk acoustic resonators (FBARS) have resonant frequencies that vary with manufacturing variations, but tend to be matched when in proximity on an integrated circuit die. FBAR resonant frequency is determined using a fractional-N synthesizer and comparing phase/frequency of an output signal from the fractional-N synthesizer to a reference. The reference may be derived from a low frequency crystal oscillator, an external signal source, or a communications signal.

摘要翻译： 薄膜体声共振器（FBARS）具有随着制造变化而变化的谐振频率，但是当在集成电路芯片附近时，它们倾向于匹配。 使用分数N合成器确定FBAR谐振频率，并将来自分数N合成器的输出信号的相位/频率与参考值进行比较。 该参考可以从低频晶体振荡器，外部信号源或通信信号导出。