摘要:
An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.
摘要:
Some demonstrative embodiments include devices, systems and/or methods of wireless communication over a plurality of wireless communication frequency channels. For example, a wireless communication device may include a frequency source to generate a source frequency signal; a plurality of local-oscillator (LO) generators to generate a respective plurality of different carrier signal frequencies based on the source frequency signal; and a plurality of radio-frequency (RF) paths to simultaneously communicate over the plurality of carrier signal frequencies, respectively.
摘要:
This application discusses, among other things, apparatus and methods for sharing a local oscillator between multiple wireless devices. In certain examples, an apparatus can include a central frequency synthesizer configured to provide a central oscillator signal having a first frequency, a first transmitter, the first transmitter including a first transmit digital-to-time converter (DTC) configured to receive the central oscillator signal and to provide a first transmitter signal having a second frequency, and a first receiver, the first receiver including a first receive DTC configured to receive the central oscillator signal and to provide a first receiver signal having a first receive frequency.
摘要:
Determination of digital compensation to compensate for non-linearity of stochastic system configured to sample a phase difference, based on statistical analysis of calibration data generated by the stochastic system in response to a linear phase ramp. The stochastic system may include a set of stochastic sampler circuits to sample a phase difference at periodic events, and calibration data may include a digital value of set of stochastic samples for each of multiple events. The calibration data may include sequences of the digital values in which the digital values increment over a range of the stochastic system (i.e., between saturation states of the stochastic system). Statistical analysis may include histogram analysis to estimate the probability distribution of the calibration data. The stochastic system may be configured as part of a time-to-digital converter, which may be configured within a feedback loop of a digitally controllable phase lock loop.
摘要:
Embodiments provide a multi-phase voltage controlled oscillator (VCO) that produces a plurality of out-put signals having a common frequency and different phases. In one embodiment, the VCO may include a passive conductive structure having a first ring and a plurality of taps spaced around the first ring. The VCO may further include a capacitive load coupled to the passive conductive structure, one or more feedback structures coupled between a pair of opposing taps of the plurality of taps, and one or more current injection devices coupled between a pair of adjacent taps of the plurality of taps.
摘要:
An apparatus comprises a transmit network to transmit an input from a first amplifier to an antenna, a receive network to provide an input from an antenna to a second amplifier, a first switch to selectively decouple the transmit network from the antenna, and a second switch to selectively decouple the receive network from the antenna. Other embodiments may be described.
摘要:
Some demonstrative embodiments include devices, systems and/or methods of detecting transmitter power. For example, a device may include a power detection circuit, coupled by a first coupler to a transmit chain, to provide a first output representing a measured non-calibrated transmission power over the transmit chain; a reference circuit, coupled to a reference voltage by a second coupler, to provide a second output representing a measured reference coupling factor; and a calibrator to determine a calibrated transmission power over the transmit chain based on the first and second outputs.
摘要:
Disclosed is a method and apparatus to extend TDC resolution to better than 1 ps without incurring a matching and power penalty. Higher resolution can be achieved by segmenting the resolution between a mismatch free re-circulating time-to-digital converter (RTDC) and a stochastic time-to-digital converter (STDC). The disclosed RTDC replicates the same delay element to eliminate mismatch with the required dynamic range (200 ps for a 5 GHz example) and moderate resolution (3-5 ps typical corresponding to 6-7 bits for the 5 GHz case). While the STDC can achieve a resolution of 50 fs but with a range of only 3-5 ps which also corresponds to approximately 6-7 additional bits by exploiting process variations and mismatch to achieve a very fine resolution with limited dynamic range.
摘要:
Some demonstrative embodiments include devices, systems and/or methods of wireless communication over a plurality of wireless communication frequency channels. For example, a wireless communication device may include a frequency source to generate a source frequency signal; a plurality of local-oscillator (LO) generators to generate a respective plurality of different carrier signal frequencies based on the source frequency signal; and a plurality of radio-frequency (RF) paths to simultaneously communicate over the plurality of carrier signal frequencies, respectively.
摘要:
In some embodiments, provided are calibration techniques for measuring mismatches between TDL delay stage elements, and in some cases, then compensating for the mismatches to minimize performance degradation.