-
公开(公告)号：US20200058727A1
公开(公告)日：2020-02-20
申请号：US16521394
申请日：2019-07-24
Inventor： Sang Gab KIM , Hyun Min CHO , Tae Sung KIM , Yu-Gwang JEONG , Su Bin BAE , Jin Seock KIM , Sang Gyun KIM , Hyo Min KO , Kil Won CHO , Han Sol LEE
IPC: H01L27/32
Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.
-
公开(公告)号：US20200036397A1
公开(公告)日：2020-01-30
申请号：US16453097
申请日：2019-06-26
Inventor： Min JANG , Jiwon PARK , Kyeongcheol YANG , Daeyeol YANG , Hongsil JEONG
Abstract: A communication scheme and system for converging a 5th generation (5G) communication system for supporting a data rate higher than that of a 4th generation (4G) system with an internet of things (IoT) technology are provided. The present disclosure is applicable to intelligent services (e.g., smart home, smart building, smart city, smart car or connected car, health care, digital education, retail, and security and safety-related services) based on the 5G communication technology and the IoT-related technology. The disclosure relates to a punctured polar code design method and apparatus and proposes optimal puncturing pattern and information set selection criteria for designing punctured polar codes.
-
公开(公告)号：US20200026323A1
公开(公告)日：2020-01-23
申请号：US16474524
申请日：2017-11-30
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Jae Yoon SIM , Hwa Suk CHO
Abstract: The present invention relates to a design technology of a phase locked loop (PLL) for generating an accurate clock frequency in a clock synchronization system.The present invention suggests a new structure based on a hardware description language (HDL), and thus reduces a chip area of a frequency synthesizer while obtaining a wide frequency operation range.Furthermore, since only the HDL is used, the entire frequency synthesizer becomes all-synthesizable, and auto layout (auto P&R) can be achieved through a tool, which makes it possible to reduce a design cost of a designer.
-
44.发明申请公开(公告)号：US20200006670A1
公开(公告)日：2020-01-02
申请号：US16272969
申请日：2019-02-11
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Joon Hak OH , Xiaobo SHANG , Inho SONG
IPC: H01L51/00
Abstract: A chiral organic ligand according to an exemplary embodiment is any one selected from the group consisting of organic ligands represented by the following Chemical Formula 1 and Chemical Formula 2: wherein X1 and X2 independently of each other R1, R3, R5, and R7 are independently of one another any one selected from the group consisting of a carboxy group, a hydroxyl group, an amino group, a sulfhydryl group, and a phosphate; and R2, R4, R6, and R8 are independently of one another any one selected from the group consisting of C1 to C5 alkyl groups and C1 to C5 aryl groups.
-
公开(公告)号：US10518253B2
公开(公告)日：2019-12-31
申请号：US15429850
申请日：2017-02-10
Inventor： Suk Bong Hong , Donghui Jo , Taekyung Ryu , Gi Tae Park , In-Sik Nam , Pyung Soon Kim , Chang Hwan Kim
IPC: B01J29/06 , B01J29/76 , B01D53/94 , B01J37/02 , C01B39/14 , C01B39/02 , B01J29/80 , B01J29/072 , B01J35/00 , B01J35/04 , B01J37/04 , B01J37/08 , B01J37/30 , F01N3/20
Abstract: A catalyst includes LTA zeolite including copper ions, wherein a Si/Al ratio of the LTA zeolite is 2 to 50. The catalyst is coated on a honeycomb carrier or a filter. The catalyst removes NOx from a reaction gas at 100° C. or above. The catalyst has an NOx conversion rate of 80% at 450° C. or above.
-
Patent Agency Ranking
公开(公告)号：US20190386727A1
公开(公告)日：2019-12-19
申请号：US16441990
申请日：2019-06-14
Inventor： Younghyun JEON , Namyoon LEE , Eunyong KIM , Chulhee JANG , Jiwook CHOI , Yunseo NAM
Abstract: The disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as long term evolution (LTE). An operating method of a base station in a wireless communication system is provided. The operating method includes estimating a channel for each of a plurality of terminals based on reference signals received from the plurality of the terminals, determining a beamforming vector matrix for each of the plurality of the terminals by considering scheduling and power allocation information based on the estimated channels, and transmitting data to at least one of the plurality of the terminals using the determined beamforming vector matrix.
-
公开(公告)号：US10476398B1
公开(公告)日：2019-11-12
申请号：US15968644
申请日：2018-05-01
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Minsung Kim , Sooa Kim , Bumyun Kim
Abstract: The present invention relates to a technique for expanding an input voltage range of a power conversion circuit for photovoltaic power generation, and improving the efficiency of the power conversion circuit.The power conversion circuit for photovoltaic power generation with high efficiency over a wide input voltage range may include: a full-bridge converter unit including a full-bridge converter constituted by first to fourth switches, and configured to operate in a resonant boost mode or phase-shift full-bridge series-resonant converter mode, and convert an input DC voltage into a DC voltage having a level equal to or lower than the input DC voltage; an active voltage-doubler rectifier circuit including a half-bridge converter constituted by fifth and sixth switches, a resonance inductor and a resonance capacitor, and configured to boost an input voltage to a target-level DC voltage, and output the DC voltage to a load; and a transformer configured to connect the full-bridge converter and the active voltage-doubler rectifier to each other in their insulation.
-
公开(公告)号：US20190311589A1
公开(公告)日：2019-10-10
申请号：US16191378
申请日：2018-11-14
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Seung Moon CHOI , Sung Hwan SHIN
Abstract: Disclosed are an apparatus and method for providing a virtual texture. The apparatus and method for providing a virtual texture includes a signal generator, a signal adjuster, and a signal output part to generate composite tactile signal including a virtual vibrotactile signal and a virtual force-feedback signal so that a virtual texture of a target object may be reproduced in a virtual reality.
-
公开(公告)号：US20190307688A1
公开(公告)日：2019-10-10
申请号：US16330068
申请日：2017-09-01
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Hyung Joon CHA , Tae Yoon PARK , Hyo Jeong KIM , Bong Hyuk CHOI
Abstract: The present disclosure relates to a novel stem cell carrier and a method for producing the same and provides a method for producing a stem cell carrier including a step of contacting stem cells with a coacervate formed by mixing an anionic polymer with a mussel adhesive protein or a mutant thereof. The present disclosure relates to a novel stem cell therapeutic agent platform of delivering cells in a encapsulated state by forming an adhesive cell carrier using crosslinked coacervate. The cell carrier of the present disclosure can maintain the ability to differentiate stem cells as well as biocompatibility and can survive without losing cell adhesion even under oxygen-deficient conditions. In addition, the cell carrier of the present disclosure has an excellent regenerative effect by applying such to biological tissues in which vascular regeneration is not easy, by inducing a metabolic reaction triggered by the hypoxic environment, in particular, neovascularization.
-
公开(公告)号：US20190299211A1
公开(公告)日：2019-10-03
申请号：US16132582
申请日：2018-09-17
Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
Inventor： Wan Kyun Chung , Junsu Kang , Young Jin Heo , Donghyeon Lee
Abstract: Provided are a microfluidic control scheduler circuit and a the lab-on-a-chip. The microfluidic control scheduler circuit includes an input channel serving as a flow path between an input port and a membrane capacitor, a gate supply channel serving as a flow path between the membrane capacitor and a main valve, a gate supply port connected to the gate supply channel via a fluid resistance channel and a relief valve, and a scheduler module including an output channel serving as a flow path between a source supply port and an output port via the main valve, wherein the scheduler module is provided in plurality. The microfluidic control scheduler circuit and the lab-on-a-chip according to the present disclosure may sequentially and independently control a certain process without external control, thereby automating the lab-on-a-chip for processing a microfluid.
-
-
-
-
-
-
-
-
-
Search Results
858
records
(took 0.027 seconds)
