公开(公告)号：US4812961A

公开(公告)日：1989-03-14

申请号：US50896

申请日：1987-05-15

申请人： Robert Essaff ,  Robert C. Dobkin

发明人： Robert Essaff ,  Robert C. Dobkin

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8222 ,  H01L27/06 ,  H02M3/07 ,  H02M3/18

CPC分类号： H02M3/07 ,  H02M2001/009

摘要： A charge pump circuit is integrated form utilizes a dual emitter transistor switch having low saturation voltage. The low saturation voltage for the transistor is provided by deriving a base bias voltage from the doubled voltage (2V.sub.cc) and a collector voltage from the voltage supply (V.sub.cc). Current-limiting for the transistor is provided by connecting one emitter to the base bias circuitry whereby the second emitter acts as a collector when the transistor saturates, thereby limiting the base drive and causing current-limiting.

公开(公告)号：US4496963A

公开(公告)日：1985-01-29

申请号：US19135

申请日：1979-03-09

申请人： James L. Dunkley ,  Robert C. Dobkin

发明人： James L. Dunkley ,  Robert C. Dobkin

IPC分类号： H01L29/10 ,  H01L29/808 ,  H01L29/80

CPC分类号： H01L29/808 ,  H01L29/1029

摘要： A semiconductor device wherein surface stabilization is provided by a shallow layer of ion implanted doping material on the surface of the semiconductor and beneath the passivating oxide layer. One embodiment is a bipolar transistor including a collector region, a base region and an emitter region, the base region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a zener diode device with an anode region and a cathode region, the cathode region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a JFET with a gate region and a source and drain region and a channel region extending through the gate region between the source and drain regions, the channel region being provided with the shallow ion implanted layer at the surface thereof.

摘要翻译： 一种半导体器件，其中表面稳定性由半导体表面上的钝化氧化物层下方的离子注入掺杂材料的浅层提供。 一个实施例是包括集电极区域，基极区域和发射极区域的双极晶体管，所述基极区域在其表面设置有浅离子注入层。 另一个实施例是具有阳极区域和阴极区域的齐纳二极管器件，阴极区域在其表面设有浅离子注入层。 另一实施例是具有栅极区域和源极和漏极区域以及延伸穿过源极和漏极区域之间的栅极区域的沟道区域的JFET，沟道区域在其表面处设置有浅离子注入层。

公开(公告)号：US4393575A

公开(公告)日：1983-07-19

申请号：US284664

申请日：1981-07-20

申请人： James L. Dunkley ,  Robert C. Dobkin

发明人： James L. Dunkley ,  Robert C. Dobkin

IPC分类号： H01L29/10 ,  H01L29/808 ,  H01L21/265

CPC分类号： H01L29/1058 ,  H01L29/808

摘要： A semiconductor device wherein surface stabilization is provided by a shallow layer of ion implanted doping material on the surface of the semiconductor and beneath the passivating oxide layer. One embodiment is a bipolar transistor including a collector region, a base region and an emitter region, the base region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a zener diode device with an anode region and a cathode region, the cathode region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a JFET with a gate region and a source and drain region and a channel region extending through the gate region between the source and drain regions, the channel region being provided with the shallow ion implanted layer at the surface thereof.

摘要翻译： 一种半导体器件，其中表面稳定性由半导体表面上的钝化氧化物层下方的离子注入掺杂材料的浅层提供。 一个实施例是包括集电极区域，基极区域和发射极区域的双极晶体管，所述基极区域在其表面设置有浅离子注入层。 另一个实施例是具有阳极区域和阴极区域的齐纳二极管器件，阴极区域在其表面设有浅离子注入层。 另一实施例是具有栅极区域和源极和漏极区域以及延伸穿过源极和漏极区域之间的栅极区域的沟道区域的JFET，沟道区域在其表面处设置有浅离子注入层。

公开(公告)号：US4225878A

公开(公告)日：1980-09-30

申请号：US18815

申请日：1979-03-08

申请人： Robert C. Dobkin

发明人： Robert C. Dobkin

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L23/525 ,  H01L27/10

CPC分类号： H01L23/525 ,  H01L2924/0002 ,  Y10S148/055

摘要： In a monolithic integrated circuit, on-chip trimming is implemented by connecting a zener diode across each element of a plural element trimmable resistor. Adjacent diodes are connected back to back and a pair of conventional bonding pads connected thereto. In trimming, when it is desired to short out one of the trimmable elements, the associated diode is subjected to an overload pulse by means of test probes applied to the bonding pads. Since the diodes are connected back to back, the pulse polarity will determine which diode is overloaded in the reverse bias condition. Thus, the trimmable element to be shorted is determined by pulse polarity and only one bonding pad is needed for each pair of trimmable elements.

摘要翻译： 在单片集成电路中，通过将多个元件可调电阻器的每个元件连接齐纳二极管来实现片上调整。 相邻的二极管背靠背连接，并连接一对常规的接合焊盘。 在修整中，当希望短路可调节元件之一时，相关的二极管通过施加到接合焊盘的测试探针经受过载脉冲。 由于二极管背靠背连接，脉冲极性将决定哪个二极管在反向偏置条件下过载。 因此，要短路的可调节元件由脉冲极性确定，并且对于每对可修剪元件仅需要一个接合焊盘。

公开(公告)号：US4224564A

公开(公告)日：1980-09-23

申请号：US911463

申请日：1978-06-01

申请人： Robert C. Dobkin ,  James B. Cecil ,  Joseph J. Connolly, Jr.

发明人： Robert C. Dobkin ,  James B. Cecil ,  Joseph J. Connolly, Jr.

IPC分类号： H03M1/00 ,  G05F3/00

CPC分类号： H03M1/785

摘要： A statistically enhanced ratio-matched network in a circuit chip is disclosed. The network may be either a resistance network or a capacitance network. In a ratio-matched resistance network, such as an R-2R resistance ladder, a plurality of resistances in a circuit chip have a rational ratio of resistance values to each other. All of the resistances each consists of an integral number of simultaneously fabricated resistors of approximately uniform dimensions, and certain critical resistances each consists of a series-parallel combination of the resistors for statistically enhancing the accuracy of the rational ratio of the critical resistances to each other.

摘要翻译： 公开了一种在电路芯片中统计增强的比匹配网络。 网络可以是电阻网络或电容网络。 在诸如R-2R电阻梯的比匹配电阻网络中，电路芯片中的多个电阻具有彼此的电阻值的合理比率。 所有电阻各自由大致均匀尺寸的整体数量的同时制造的电阻组成，并且某些关键电阻各自由电阻器的串联并联组合组成，用于统计提高临界电阻相互之间的有理比的精度 。

公开(公告)号：US07772920B1

公开(公告)日：2010-08-10

申请号：US12474938

申请日：2009-05-29

申请人： Michael B. Anderson ,  Robert C. Dobkin ,  Brendan John Whelan

发明人： Michael B. Anderson ,  Robert C. Dobkin ,  Brendan John Whelan

IPC分类号： G06F1/10

CPC分类号： G05F3/30

摘要： A first and a second group of individual transistors in a voltage reference may collectively function as a first and a second composite transistor with a first and a second emitter area equal to the combined areas of the emitters of the first and the second groups of individual transistors, respectively. The second emitter area may be larger than the first emitter area. The stability of the reference voltage may depend upon the stability of the ratio between the first emitter area and the second emitter area. The first group of individual transistors may not be at the center of an arrangement of the second group of individual transistors. The constant reference voltage may vary due to thermal hysteresis by less than 200 parts per million over a 40 degree centigrade temperature range.

摘要翻译： 电压基准中的第一组和第二组单独晶体管​​可共同用作第一和第二复合晶体管，其中第一和第二发射极面积等于第一和第二组单独晶体管​​的发射极的组合面积 ， 分别。 第二发射极区域可以大于第一发射极区域。 参考电压的稳定性可以取决于第一发射极区域和第二发射极区域之间的比率的稳定性。 第一组单独晶体管​​可能不在第二组单独晶体管​​的布置的中心。 在40摄氏度的温度范围内，恒定的参考电压可能会因热滞后而小于200ppm。

公开(公告)号：US20100001708A1

公开(公告)日：2010-01-07

申请号：US12541557

申请日：2009-08-14

申请人： Robert C. Dobkin

发明人： Robert C. Dobkin

IPC分类号： G05F3/02

CPC分类号： G05F1/46 ,  H02J1/10 ,  Y10S323/907 ,  Y10T307/565

摘要： Circuits and methods for paralleling voltage regulators are provided. Improved current sharing and regulation characteristics are obtained by coupling control terminals of the voltage regulators together which results in precise output voltages and proportional current production. Distributing current generation among multiple paralleled voltage regulators improves heat dissipation and thereby reduces the likelihood that the current produced by the voltage regulators will be temperature limited.

摘要翻译： 提供了并联稳压器的电路和方法。 通过将电压调节器的控制端子耦合在一起来获得改善的电流共享和调节特性，这导致精确的输出电压和成比例的电流产生。 在多个并联稳压器之间分配电流产生器可改善散热，从而降低由稳压器产生的电流将受到温度限制的可能性。

公开(公告)号：US07639078B2

公开(公告)日：2009-12-29

申请号：US12174102

申请日：2008-07-16

申请人： Surapap Rayanakorn ,  Robert C. Dobkin ,  Brendan J. Whelan

发明人： Surapap Rayanakorn ,  Robert C. Dobkin ,  Brendan J. Whelan

IPC分类号： H03F3/45

CPC分类号： H03F1/483 ,  H03F3/3022 ,  H03F3/45192 ,  H03F2200/36 ,  H03F2200/513 ,  H03F2203/30033 ,  H03F2203/45302 ,  H03F2203/45512

摘要： A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit. Another compensation circuit is configured for feeding back a signal from the output of the output stage to the input of the output stage.

摘要翻译： 具有改进的增益带宽乘积的AB类折叠共源共栅放大器包括差分输入电路，差分输入电路包括耦合到尾电流源的差分晶体管对，并响应用于传导第一电流的差分输入信号，耦合到 用于提供第二电流的差分输入电路和AB类输出级。 补偿电路被配置为将相互补偿的补偿信号从输出节点反馈到差分输入电路。 另一个补偿电路被配置为将信号从输出级的输出反馈到输出级的输入端。

公开(公告)号：US07538532B2

公开(公告)日：2009-05-26

申请号：US12076302

申请日：2008-03-17

申请人： Thomas P. Hack ,  Robert C. Dobkin

发明人： Thomas P. Hack ,  Robert C. Dobkin

IPC分类号： G05F1/40

CPC分类号： H02M3/33584 ,  G05F1/70 ,  H02M3/1582 ,  Y10T307/707

摘要： Bidirectional power conversion systems provide the ability to change power attributes to and from a component. Current bidirectional power conversion systems use a unidirectional power converter for each direction. The integration of the two normally independent power converters results in a bidirectional power converter with nearly half the size, weight, volume, cost and complexity. Described are embodiments of bidirectional power conversion systems that allow power transfer between two or more components without requiring the use of separate unidirectional power converters.

摘要翻译： 双向功率转换系统提供了向组件更改功率属性的能力。 目前的双向功率转换系统为每个方向使用单向功率转换器。 两个正常独立的功率转换器的集成导致双向功率转换器具有将近一半的尺寸，重量，体积，成本和复杂性。 描述了允许在两个或更多个组件之间进行功率传输而不需要使用单独的单向功率转换器的双向功率转换系统的实施例。

公开(公告)号：US06636021B2

公开(公告)日：2003-10-21

申请号：US10324628

申请日：2002-12-18

申请人： Jeffrey Schenkel ,  Albert M. Wu ,  Robert C. Dobkin ,  Steven M. Pietkiewicz

发明人： Jeffrey Schenkel ,  Albert M. Wu ,  Robert C. Dobkin ,  Steven M. Pietkiewicz

IPC分类号： H02J714

CPC分类号： H05B41/30 ,  H02M3/33507

摘要： The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.

摘要翻译： 本发明提供一种对容性负载进行充电的电容器充电电路。 特别地，电路和技术优选地被提供用于使用来自变压器的初级和次级绕组的电流来控制开关的导通时间和关断时间。 这种布置优选地产生适应性导通时间和适应性关断时间开关，其能够快速地从低至零伏至几百伏的电容器负载充电。 优选间接测量输出电压以防止不必要的功率消耗。 此外，一旦达到期望的输出电压，可以提供控制电路来节省电力以停止向电容器负载的电力输送。 控制电路优选地操作询问定时器，周期性地启动功率传递周期，以将电容器输出负载维持在恒定的准备状态。