DETERMINATION OF SIGNALS FOR READBACK FROM FPGA
    41.
    发明申请
    DETERMINATION OF SIGNALS FOR READBACK FROM FPGA 审中-公开
    从FPGA中读取信号的确定

    公开(公告)号:US20160085519A1

    公开(公告)日:2016-03-24

    申请号:US14863494

    申请日:2015-09-24

    CPC classification number: G06F8/35 G06F17/5054

    Abstract: A method for automatically determining models signals of an FPGA program which are readable from the FPGA with the aid of a readback following an FPGA build, including the following steps: generating an FPGA model and generating an FPGA code from the FPGA model, the method comprising the additional step of an automatic analysis for the purpose of identifying signals which are readable from the FPGA with the aid of a readback, prior to the completion of the step of generating the FPGA code from the FPGA model, and the method comprises the step of outputting signals which are readable from the FPGA with the aid of a readback. A data processing device is also provided for carrying out the method.

    Abstract translation: 一种用于自动确定FPGA程序的模型信号的方法,其可以借助于FPGA构建之后的回读从FPGA中读取,包括以下步骤:从FPGA模型生成FPGA模型并生成FPGA代码,该方法包括 在从FPGA模型生成FPGA代码的步骤完成之前,借助于回读来鉴别可从FPGA读取的信号的自动分析的附加步骤包括以下步骤: 输出可从FPGA读取的信号,借助回读。 还提供了一种用于执行该方法的数据处理装置。

    Method for manipulating a memory operation of a control unit program on a virtual or real memory
    42.
    发明授权
    Method for manipulating a memory operation of a control unit program on a virtual or real memory 有权
    用于在虚拟或实际存储器上操纵控制单元程序的存储器操作的方法

    公开(公告)号:US09251024B2

    公开(公告)日:2016-02-02

    申请号:US14167154

    申请日:2014-01-29

    CPC classification number: G06F11/263 G06F11/3466 G06F11/3476 G06F11/3624

    Abstract: A method for manipulating a memory operation of a control unit program on a memory of a virtual or real electronic control unit (ECU), such as is used in vehicles, for example. The manipulation of the memory operation is accomplished by a memory manipulation program component, via which a set of manipulation functions is provided, from which at least one manipulation function is selected, so that this function, by activating the memory manipulation program component, changes a memory access initiated by the control unit program in accordance with the selected manipulation function during execution of the control unit program.

    Abstract translation: 一种用于操纵例如在车辆中使用的虚拟或实际电子控制单元(ECU)的存储器上的控制单元程序的存储器操作的方法。 存储器操作的操作通过存储器操作程序组件完成,存储器操作程序组件通过其提供一组操作功能,从中选择至少一个操作功能,使得该功能通过激活存储器操作程序组件来改变 在控制单元程序执行期间由控制单元程序根据所选择的操作功能发起的存储器访问。

    ARRANGEMENT FOR PARTIAL RELEASE OF A DEBUGGING INTERFACE
    43.
    发明申请
    ARRANGEMENT FOR PARTIAL RELEASE OF A DEBUGGING INTERFACE 有权
    部分释放调试接口的安排

    公开(公告)号:US20160018464A1

    公开(公告)日:2016-01-21

    申请号:US14804500

    申请日:2015-07-21

    Abstract: An arrangement for the partial release of a debug interface of a programmable hardware component, whereby a first logic for the programmable hardware component can be stored in a configuration memory and a configuration device is designed to program the programmable hardware component via a configuration interface of the programmable hardware component according to the first logic. The configuration device is further designed to register a programming process of the programmable hardware component which occurs via the debug interface according to a second logic and, upon termination of the programming process occurring via the debug interface, reprograms the programmable hardware component according to the first logic.

    Abstract translation: 用于部分释放可编程硬件组件的调试接口的装置,由此用于可编程硬件组件的第一逻辑可以存储在配置存储器中,并且配置设备被设计为经由可编程硬件组件的配置接口对可编程硬件组件进行编程 可编程硬件组件根据第一逻辑。 所述配置装置还被设计为根据第二逻辑注册经由调试接口发生的可编程硬件组件的编程过程,并且在通过调试接口发生的编程处理结束时,根据第一逻辑重新编程可编程硬件组件 逻辑。

    Random access to signal values of an FPGA at runtime
    44.
    发明授权
    Random access to signal values of an FPGA at runtime 有权
    在运行时随机访问FPGA的信号值

    公开(公告)号:US09235425B2

    公开(公告)日:2016-01-12

    申请号:US14177583

    申请日:2014-02-11

    Inventor: Heiko Kalte

    CPC classification number: G06F9/4401 G06F17/5027 G06F17/5054

    Abstract: A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.

    Abstract translation: 一种在运行时访问FPGA的信号值的方法,包括将FPGA硬件配置加载到FPGA中的步骤,在FPGA中执行FPGA硬件配置,请求FPGA的信号值,从功能级别发送状态数据 的FPGA到其配置级的配置存储器,从配置存储器读取状态数据作为回读数据,并确定回读数据的信号值。 还提供了一种用于使用硬件描述语言来制作基于FPGA模型的FPGA构建的方法,所述方法包括以下步骤:创建FPGA硬件配置,识别用于基于至少一个基于信号值的状态数据的配置存储器的存储器位置 在FPGA硬件配置上,并创建一个列表,其中可以在运行时可访问的信号值和与之对应的存储单元。

    IMPLEMENTING A CONSTANT IN FPGA CODE
    45.
    发明申请
    IMPLEMENTING A CONSTANT IN FPGA CODE 审中-公开
    实现FPGA代码中的一个常数

    公开(公告)号:US20150379178A1

    公开(公告)日:2015-12-31

    申请号:US14753439

    申请日:2015-06-29

    CPC classification number: G06F17/5054 G06F8/30

    Abstract: A method for generating FPGA code based on an FPGA model with at least one signal value that is modeled as a constant. A constant is inserted with a predefined signal value in the FPGA model. A switching variable is set in the FPGA model for switching between a normal mode and a calibration mode for the FPGA code. The FPGA code is generated for the FPGA model having the implementation of the constants in the FPGA code, wherein the implementation of the constants when the switching variable is set for normal mode includes the implementation of the constants as a fixed value in the FPGA code, and the implementation of the constants when the switching variable is set for calibration mode includes the implementation of the constants as a modifiable signal value in the FPGA code. A method for calibrating an FPGA model is also provided.

    Abstract translation: 一种基于具有至少一个被建模为常数的信号值的FPGA模型生成FPGA代码的方法。 在FPGA模型中使用预定义的信号值插入常数。 在FPGA模型中设置了切换变量,用于在正常模式和FPGA代码的校准模式之间切换。 为具有FPGA代码中常量实现的FPGA模型生成FPGA代码,其中当切换变量设置为正常模式时常数的实现包括将常数实现为FPGA代码中的固定值, 并且当切换变量设置为校准模式时,常数的实现包括在FPGA代码中将常数实现为可修改的信号值。 还提供了一种用于校准FPGA模型的方法。

    Method and device for creating and testing a control unit program
    46.
    发明授权
    Method and device for creating and testing a control unit program 有权
    用于创建和测试控制单元程序的方法和设备

    公开(公告)号:US09201764B2

    公开(公告)日:2015-12-01

    申请号:US13937691

    申请日:2013-07-09

    CPC classification number: G06F11/3664 G06F11/3644 G06F11/3688

    Abstract: A development device and a method for creating and testing a control unit program, whereby the preparation of an intervention point for manipulating a quantity of a runtime environment for testing a control unit program component in a test environment having a test scenario program component and an observation device for receiving output values and indicating the test result. An executable program containing all program components is created from one or more program components, including a control unit program component that is to be tested and a test scenario program component. The creation includes generation of a runtime environment, wherein the runtime environment provides a communication channel for transmitting input and output values between the program components, and wherein a component test service is provided that offers an interface to the runtime environment pursuant to the AUTOSAR standard as an intervention point for manipulating a quantity of the runtime environment.

    Abstract translation: 一种用于创建和测试控制单元程序的开发设备和方法,其中,在具有测试场景程序组件和观察的测试环境中,准备用于操纵用于测试控制单元程序组件的运行时环境的数量的介入点 用于接收输出值并指示测试结果的设备。 包含所有程序组件的可执行程序由一个或多个程序组件创建,包括要测试的控制单元程序组件和测试场景程序组件。 创建包括生成运行时环境,其中运行时环境提供用于在程序组件之间传送输入和输出值的通信通道,并且其中提供了组件测试服务,该组件测试服务根据AUTOSAR标准为运行时环境提供接口 用于操纵一定数量的运行时环境的干预点。

    METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM
    47.
    发明申请
    METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM 有权
    用于自动生成FPGA程序的列表的方法

    公开(公告)号:US20150331983A1

    公开(公告)日:2015-11-19

    申请号:US14711116

    申请日:2015-05-13

    CPC classification number: G06F17/5054

    Abstract: A method for generating a netlist of an FPGA program. The model of the FPGA program is composed of at least two components, each component being assigned a separate partition on the FPGA. An independent build is carried out for each component and an overall classification is generated from the components, wherein the build jobs are automatically started after a trigger event and the trigger event is a saving of a component, the exiting of a component of the design, or a time-controlled, automated initiation of a build.

    Abstract translation: 一种用于生成FPGA程序的网表的方法。 FPGA程序的模型由至少两个组件组成,每个组件在FPGA上分配一个单独的分区。 对于每个组件执行独立构建,并且从组件生成整体分类,其中构建作业在触发事件之后自动启动,并且触发事件是组件的保存,设计的组件的退出, 或时间控制,自动启动构建。

    METHOD FOR GENERATING A CONTROL PROGRAM THAT CAN BE EXECUTED ON A CONTROL SYSTEM
    48.
    发明申请
    METHOD FOR GENERATING A CONTROL PROGRAM THAT CAN BE EXECUTED ON A CONTROL SYSTEM 有权
    用于产生可在控制系统上执行的控制程序的方法

    公开(公告)号:US20150255038A1

    公开(公告)日:2015-09-10

    申请号:US14640315

    申请日:2015-03-06

    Abstract: A computer-implemented method for generating a control program that is executable on a control system from a graphical control model. A better utilization of the control system is achieved in that the graphical control model is translated into program code such that the generated program code has at least one FXP operation and at least one FLP operation, and in that the generated program code is translated into the executable control program such that when the control program is executed on the control system a portion of the control program is executed on the FXP unit and another portion of the control program is executed on the FLP unit.

    Abstract translation: 一种用于从图形控制模型生成可在控制系统上执行的控制程序的计算机实现的方法。 实现控制系统的更好的利用是将图形控制模型转换成程序代码,使得生成的程序代码具有至少一个FXP操作和至少一个FLP操作,并且所生成的程序代码被转换为 可执行控制程序,使得当在控制系统上执行控制程序时,在FXP单元上执行控制程序的一部分,并且在FLP单元上执行控制程序的另一部分。

    METHOD FOR OPTIMIZING UTILIZATION OF PROGRAMMABLE LOGIC ELEMENTS IN CONTROL UNITS FOR VEHICLES
    49.
    发明申请
    METHOD FOR OPTIMIZING UTILIZATION OF PROGRAMMABLE LOGIC ELEMENTS IN CONTROL UNITS FOR VEHICLES 有权
    优化车辆控制单元中可编程逻辑元件的使用方法

    公开(公告)号:US20150205281A1

    公开(公告)日:2015-07-23

    申请号:US14602571

    申请日:2015-01-22

    Inventor: Olaf Grajetzky

    CPC classification number: G05B19/05 G05B17/02 G06F17/5022

    Abstract: A method and a system for optimizing utilization of a programmable logic element for use in an electronic control unit for vehicles, wherein the programmable logic element has a soft CPU and/or an unused remaining area. A plurality of model variants is generated that reproduce functionality of the control unit, and generate a plurality of soft CPU configurations with differing configuration scope, which occupy an area corresponding to the configuration scope of the programmable logic element, and execute processor-in-the-loop simulations for the plurality of model variants and/or soft CPU configurations after instantiation of the soft CPU corresponding to the soft CPU configuration on a programmable logic element. The profiling data acquired for the soft CPU during the PIL simulation is used with regard to the processing of the input signal for optimizing utilization of the programmable logic element.

    Abstract translation: 一种用于优化用于车辆的电子控制单元的可编程逻辑元件的利用的方法和系统,其中所述可编程逻辑元件具有软CPU和/或未使用的剩余区域。 生成多个模型变型,其再现控制单元的功能,并且生成具有不同配置范围的多个软CPU配置,其占据与可编程逻辑元件的配置范围对应的区域,并且执行处理器 在可编程逻辑元件上对应于软CPU配置的软CPU实例化之后的多个模型变型和/或软CPU配置的循环模拟。 关于用于优化可编程逻辑元件的利用的输入信号的处理,使用在PIL仿真期间为软CPU获取的分析数据。

    METHOD FOR CHANGING THE SOFTWARE IN THE MEMORY OF AN ELECTRONIC CONTROL UNIT
    50.
    发明申请
    METHOD FOR CHANGING THE SOFTWARE IN THE MEMORY OF AN ELECTRONIC CONTROL UNIT 审中-公开
    用于更改电子控制单元存储器中的软件的方法

    公开(公告)号:US20150160940A1

    公开(公告)日:2015-06-11

    申请号:US14564742

    申请日:2014-12-09

    CPC classification number: G06F8/65 G06F8/656 G06F8/66

    Abstract: A method for changing a software in the memory of an electronic control unit. A bypass routine is stored in the working memory of the electronic control unit, and the address of the bypass function is stored in a table. A service function reads the address from the table and calls the bypass routine. The bypass routine is replaceable at the run time of the electronic control unit by erasing the table entry. The call of the service function is integrated into the program code of the electronic control unit by an overlay memory, a memory management unit, or with the aid of watch points.

    Abstract translation: 一种用于改变电子控制单元的存储器中的软件的方法。 旁路例程存储在电子控制单元的工作存储器中,旁路功能的地址存储在表中。 服务功能从表中读取地址并调用旁路例程。 旁路程序可以在电子控制单元的运行时间通过擦除表项来替换。 服务功能的调用通过重叠存储器,存储器管理单元或借助于观察点被集成到电子控制单元的程序代码中。

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