公开(公告)号：US5828891A

公开(公告)日：1998-10-27

申请号：US766689

申请日：1996-12-13

申请人： Alain Benayoun ,  Jean-Francois Le Pennec ,  Patrick Michel

发明人： Alain Benayoun ,  Jean-Francois Le Pennec ,  Patrick Michel

IPC分类号： G06F13/24 ,  G06F9/48 ,  G06F13/26 ,  G06F9/46

CPC分类号： G06F13/26

摘要： The invention relates to multilevel interrupt device (10) using a common microprocessor interrupt signal (101) to process interrupt signals (INT1, . . . , INTN) received from N peripheral chips. This device (10) is connected to a microprocessor (100) and N peripheral chips (200,210,230) through data/address busses (108,110) and it is also connected to a memory (150) by an additional bus (112). An interrupt operation starts when any one of the peripheral chips activates an interrupt signal through OR gate (220) detected by the microprocessor. The invention avoids to involve the microprocessor in the determination of the interrupt requester except for the generation of a common start.sub.-- address decoded by logic (180) for starting interrupt operations and a common end.sub.-- address decoded by logic (190) for ending it. Owing to the start.sub.-- address and the interrupt signals (173,174) received, latch (170) generates a translated address to memory (150) through a multiplexer (160) to start the corresponding interrupt routine stored at this translated address. The activation of any one of the peripheral chips leads to the reading of the corresponding interrupt routine stored in the memory without requiring any action of the microprocessor. The number of interrupt routines depends on the possible combinations of the N interrupt signals.

摘要翻译： 本发明涉及使用公共微处理器中断信号（101）来处理从N个外围芯片接收的中断信号（INT1，...，INTN）的多电平中断装置（10）。 该设备（10）通过数据/地址总线（108,110）连接到微处理器（100）和N个外围芯片（200,210,230），并且还通过附加总线（112）连接到存储器（150）。 当任何一个外围芯片通过由微处理器检测到的或门（220）激活中断信号时，中断操作开始。 本发明避免涉及微处理器确定中断请求者，除了生成由用于启动中断操作的逻辑（180）解码的公共起始地址以及由逻辑（190）解码以用于结束它的公共结束地址。 由于接收到起始地址和中断信号（173,174），锁存器（170）通过多路复用器（160）产生到存储器（150）的转换地址，以启动存储在该翻译地址处的相应中断程序。 任何一个外围芯片的激活导致读取存储在存储器中的相应的中断程序，而不需要微处理器的任何动作。 中断程序的数量取决于N个中断信号的可能组合。

公开(公告)号：US5771262A

公开(公告)日：1998-06-23

申请号：US716077

申请日：1996-09-19

申请人： Alain Benayoun ,  Jean-Francois Le Pennec ,  Patrick Michel ,  Henri Giuliano

发明人： Alain Benayoun ,  Jean-Francois Le Pennec ,  Patrick Michel ,  Henri Giuliano

IPC分类号： H04L25/02 ,  H03H11/28 ,  H04B3/02 ,  H04B3/00

CPC分类号： H04B3/02 ,  H03H11/28

摘要： The invention provides an impedance adapter that automaticaly switches to impedances that match network transmit/receive lines impedances (105,106) by a controlled switching of various impedances mounted serially/parallely with connected transmitter/receiver (100,101). For a high speed adapter, a balanced transmitter/receiver is required for limiting crosstalk effect due to the high transmission rate. Transmit/Receive impedance adaptation networks (102-103) are composed of serial/parallel networks of resistors and relay contacts that are switched independently by magnetic coils of an impedance switching circuit (110) and having values conformable to the various network impedances imposed by different national regulations. By using the principle of double deviation voltage technique, a measuring circuit (108) detects upward and downward voltages (VA,VB), VB amplified by 2 to generate an analog signal VS (VS=VA-2VB) to a control logic circuit (109). This circuit (109) determines if the resistors value selected by the magnetic coils of said impedance switching circuit (110) is equal or not equal to the impedance of the network lines (106,105). Thus, it compares VS to a voltage Vref (25) to generate an output which selects and activates the correct magnetic coil for changing or keeping equal the resistors of the receive/transmit impedance network (102,103) currently connected to the network lines (105,106).

摘要翻译： 本发明提供一种阻抗适配器，其通过与所连接的发射机/接收机（100,101）串联/并行安装的各种阻抗的受控切换，自动切换到与网络发射/接收线路阻抗（105,106）匹配的阻抗。 对于高速适配器，由于高传输速率，需要一个平衡的发射器/接收器来限制串扰效应。 发射/接收阻抗适配网络（102-103）由电阻器和继电器触点的串联/并联网络组成，其由阻抗开关电路（110）的磁线圈独立地切换，并且具有与不同的不同网络阻抗匹配的值 国家规定。 通过使用双偏压电压技术的原理，测量电路（108）检测向上和向下的电压（VA，VB），VB放大2以产生模拟信号VS（VS = VA-2VB）到控制逻辑电路 109）。 该电路（109）确定由所述阻抗开关电路（110）的磁线圈选择的电阻值是否等于网线（106,105）的阻抗。 因此，它将VS与电压Vref（25）进行比较以产生输出，该输出选择并激活正确的磁线圈，用于改变或保持与当前连接到网络线路（105,106）的接收/发射阻抗网络（102,103）的电阻相等， 。

公开(公告)号：US07228430B2

公开(公告)日：2007-06-05

申请号：US10250722

申请日：2002-01-11

申请人： Alain Benayoun ,  Jacques Fieschi ,  Jean-Francois Le Pennec ,  Pascal Roy

发明人： Alain Benayoun ,  Jacques Fieschi ,  Jean-Francois Le Pennec ,  Pascal Roy

IPC分类号： H04K1/00 ,  H04L9/00 ,  H04L9/30 ,  G06F7/04 ,  G06F17/30 ,  G06K9/00 ,  H03M1/68

CPC分类号： G06F21/34

摘要： A security system for preventing unauthorized use of a computer device. An extractable security piece includes an extractable main private key and a main PC public key. A PC security area which is a non-extractable part of the computer device includes a PC private key and an extractable main public key, which, together with the keys of the extractable security piece, constitute a Public Key Infrastructure. The extractable security piece and the PC security area include processing means for mutual authentication of the extractable security piece and the PC security area after the extractable security piece, which had been previously removed, has been reinserted in the computer device, thereby enabling the authorized user to access data stored in the computer device.

摘要翻译： 一种用于防止未经授权使用计算机设备的安全系统。 可提取的安全件包括可提取的主私钥和主PC公开密钥。 作为计算机装置的不可抽取部分的PC安全区域包括PC专用密钥和可提取的主公开密钥，其与可提取安全件的密钥一起构成公钥基础设施。 可提取安全件和PC安全区域包括在先前已经被去除的可提取安全件已被重新插入计算机设备之后，可提取安全件和PC安全区域的相互认证的处理装置，从而使得授权用户 以访问存储在计算机设备中的数据。

公开(公告)号：US07751312B2

公开(公告)日：2010-07-06

申请号：US10860293

申请日：2004-06-03

申请人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

发明人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

IPC分类号： G01R31/08

CPC分类号： H04L49/552 ,  H04L49/1523

摘要： The disclosed invention relates to a re-synchronization system that operates in a switching arrangement receiving a plurality of incoming data packets. The switching arrangement is made of an active switch card that transmits the incoming data packets and a backup switch card that may be re-activated by an operator after replacement. The re-synchronization system is implemented in each switch card. When the backup switch card is re-activated, both switch cards receive the incoming data packets and the system of the invention allows to re-synchronized both switch cards by controlling the transmission of the incoming data packets out of each switch card until the same data packets are transmitted. The re-synchronization system further comprise storage for storing the incoming data packets and detector for detecting a re-synchronization information among the incoming data packets.

摘要翻译： 所公开的本发明涉及一种在接收多个输入数据分组的交换机构中操作的再同步系统。 切换装置由传送数据包的主动交换卡和备用交换机卡组成，备用交换机卡可以由操作员在更换后重新激活。 在每个交换机卡中实现重新同步系统。 当备用交换卡被重新启动时，两个交换卡都接收输入的数据包，并且本发明的系统允许通过控制每个交换机卡中的输入数据分组的传输来重新同步两个交换机卡，直到相同的数据 数据包被传输。 重新同步系统还包括用于存储输入数据分组的存储器和用于检测输入数据分组之间的重新同步信息的检测器。

公开(公告)号：US07006498B2

公开(公告)日：2006-02-28

申请号：US09920683

申请日：2001-08-02

申请人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

发明人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L12/66

CPC分类号： H04L12/4608

摘要： An improved data transmission system including multiple local area networks (LANs) coupled by a hub that further includes multiple LAN adapters coupled to the LANs, and an asynchronous transfer mode (ATM) crossbar switch coupling all LAN adapters. LAN data frames are converted into concatenated slots of an identical size and transmitted through the ATM crossbar switch. At least the requesting LAN adapter coupled to the LAN to transmit LAN data frame includes a serial communication controller (SCC) that converts a received LAN data frame into serial data. The SCC also includes a means for converting serial data to LAN data frames.

公开(公告)号：US06823348B2

公开(公告)日：2004-11-23

申请号：US09493242

申请日：2000-01-28

申请人： Alain Benayoun ,  Jacques Fieschi ,  Jean-François Le Pennec ,  Patrick Michel

发明人： Alain Benayoun ,  Jacques Fieschi ,  Jean-François Le Pennec ,  Patrick Michel

IPC分类号： G06F1730

CPC分类号： G06F17/30067 ,  Y10S707/99953 ,  Y10S707/99954

摘要： A file manager (and method) provided for locating a file identified by a path referring to a logical unit and an identifier, includes a table associating the file with a priority list of physical units. The file manager can be incorporated into the controller of peripheral devices in a computer system or an operating system of the computer system.

摘要翻译： 提供用于定位由参考逻辑单元和标识符的路径识别的文件的文件管理器（和方法）包括将文件与物理单元的优先级列表相关联的表格。 文件管理器可以并入到计算机系统或计算机系统的操作系统中的外围设备的控制器中。

公开(公告)号：US06904046B2

公开(公告)日：2005-06-07

申请号：US09683430

申请日：2001-12-28

申请人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

发明人： Alain Benayoun ,  Patrick Michel ,  Gilles Toubol

IPC分类号： H04L12/931 ,  H04L12/28

CPC分类号： H04L49/351 ,  H04L49/40 ,  H04L49/506

摘要： Data transmission system comprising a plurality of Local Area Networks (LANs) (10-1 to 10-4) interconnected by a hub (12) including the same plurality of LAN adapters (16-1 to 16-4) respectively connected to the LANs and a packet switch (14) interconnecting all LAN adapters wherein a packet transmitted by any adapter to the packet switch includes a header containing at least the address of the adapter to which the packet is forwarded. At each cross point is located a memory block for storing any data packet received from the input port corresponding to the cross point and which is to be forwarded to the output port corresponding to the cross point. The packet switch is composed of N×N identical packet switch modules with each of the packet switch modules being associated with m input ports and m output ports and comprises a rank selector which is programmed to provide a rank k from 0 to N−1 to each column of N modules corresponding to the same output ports, this rank being provided to all memory blocks of the column in order to shift the physical address of each output port in the column by an offset of k×m.

摘要翻译： 数据传输系统包括由集线器（12）互连的多个局域网（LAN）（10-1至10-4），所述集线器包括分别连接到所述LAN的同一多个LAN适配器（16-1至16-4） 以及互连所有LAN适配器的分组交换机（14），其中由任何适配器发送到分组交换机的分组包括至少包含分组转发到的适配器的地址的报头。 在每个交叉点处设置有存储块，用于存储从与交叉点对应的输入端口接收的任何数据分组，并且将被转发到对应于交叉点的输出端口。 分组交换机由N×N个相同分组交换模块组成，其中每个分组交换模块与m个输入端口和m个输出端口相关联，并且包括等级选择器，其被编程为向每个列提供从0到N-1的秩k 的N个模块对应于相同的输出端口，该等级被提供给列的所有存储块，以便将列中每​​个输出端口的物理地址移位k×m的偏移量。

公开(公告)号：US6104714A

公开(公告)日：2000-08-15

申请号：US932547

申请日：1997-09-17

申请人： Francis Baudelot ,  Alain Benayoun ,  Jean-Fracois LePennec ,  Patrick Michel

发明人： Francis Baudelot ,  Alain Benayoun ,  Jean-Fracois LePennec ,  Patrick Michel

IPC分类号： H04L12/70 ,  H04Q11/04 ,  H04L12/28 ,  H04L12/56

CPC分类号： H04Q11/0478 ,  H04L2012/5612

摘要： A method and apparatus for an isochronous traffic of Asynchronous Transfer Mode (ATM) cells in a ring network having at least two stations (101,102) and a ring server (001). The communication within the ring is based on specific isochronous control and data cells. The control cell contains a cell header, sequence number, type of command and parameter fields. The data cell contains a header and a payload divided into N m-bit slots. The isochronous data cells are shared by a plurality of stations on the ring by allocating corresponding slotlist whose identification is carried in the parameter field. Furthermore, the server provides for each station's communication link a transmit identifier in the header associated to a reference in a list of allocated slots for transmission and a receive identifier associated to a reference in a list of allocated slots for reception. The implementation of two pairs of registers whose bits correspond to each byte of the isochronous data cell enables processing in real time transmission and reception of the isochronous data cells and to concatenate the bytes to be stored in a memory and to transmit transparently unmodified or substituted bytes on the ring.

摘要翻译： 一种用于具有至少两个站（101,102）和环形服务器（001）的环形网络中的异步传输模式（ATM）小区的等时业务的方法和装置。 环内的通信基于特定的等时控制和数据信元。 控制单元包含单元头，序列号，命令类型和参数字段。 数据信元包含标题和分为N个m位时隙的净荷。 同步数据信元由环路上的多个站共享，分配对应的在列表中携带标识的槽位列表。 此外，服务器为每个站的通信链路提供与在分配的用于传输的时隙的列表中的参考相关联的头部中的发送标识符以及与用于接收的所分配的时隙的列表中的参考相关联的接收标识符。 位对应于同步数据单元的每个字节的两对寄存器的实现使得能够实时处理同步数据单元的发送和接收，并且将要存储在存储器中的字节连接并且透明地未修改或替换的字节 在戒指上

公开(公告)号：US5636370A

公开(公告)日：1997-06-03

申请号：US454448

申请日：1995-05-30

申请人： Patrick Sicsic ,  Alain Benayoun ,  Jean-Francois LePennec ,  Patrick Michel

发明人： Patrick Sicsic ,  Alain Benayoun ,  Jean-Francois LePennec ,  Patrick Michel

IPC分类号： G06F13/36 ,  G06F13/40 ,  G06F13/12

CPC分类号： G06F13/4027

摘要： A conversion cache circuit, interfacing RISC busses to CISC peripheral circuits, provides master/slave Write and Read operations in a shared memory (130) and in the internal registers of the processor of said peripheral circuits (210). It enables RISC processor to Write and Read in the internal registers of the 8-bit processor in a salve operation while the 32-bit processor may perform the Write or Read operations to the shared memory through the conversion cache circuit in a master mode. The 32-bit processor may have access directly to the memory through its own direct access memory mechanism.

摘要翻译： 将RISC总线连接到CISC外围电路的转换高速缓存电路在共享存储器（130）和所述外围电路（210）的处理器的内部寄存器中提供主/从写入和读操作。 它允许RISC处理器在硬盘操作中对8位处理器的内部寄存器进行写入和读取，而32位处理器可以通过主模式下的转换高速缓存电路对共享存储器执行写入或读取操作。 32位处理器可以通过其自身的直接访问存储机制直接访问存储器。

公开(公告)号：US07203834B1

公开(公告)日：2007-04-10

申请号：US09573527

申请日：2000-05-17

申请人： Alain Benayoun ,  Jean-Francois LePennec ,  Patrick Michel

发明人： Alain Benayoun ,  Jean-Francois LePennec ,  Patrick Michel

IPC分类号： H04L9/28 ,  H04L9/00

CPC分类号： H04L9/0891 ,  H04L9/12 ,  H04L2209/30 ,  H04L2209/60

摘要： The invention discloses a method of updating, in nodes on both ends of a secure link, the encryption key they share to encrypt and decrypt data. When having to transmit data from one of the nodes towards its peer remote node, a data base in the forwarding node, is first updated from the data to be transmitted. Then, encryption is performed and data transmitted to the peer remote node while a next-to-use encryption key is derived from the new contents of the data base. When received, data are decrypted with the current value of the encryption key and the peer remote node data base is updated identically from the received decrypted data after which a next-to-use encryption key is derived, thereby obtaining in the peer remote node, a next-to-use identical key. The data base is preferably the dictionary of a data compression/decompression system used simultaneously with encryption/decryption to transmit data over the secure link. While keys are frequently updated, for improved security, the invention does not require that key updates need to be actually distributed.

摘要翻译： 本发明公开了一种在安全链路两端的节点中更新其共享的加密密钥来加密和解密数据的方法。 当必须从其中一个节点向其对等远程节点发送数据时，转发节点中的数据库首先从要发送的数据更新。 然后，在从数据库的新内容导出下一个即用加密密钥的同时，执行加密并将数据发送到对等远程节点。 当接收到数据时，利用加密密钥的当前值解密数据，并从所接收的解密数据中对等远程节点数据库进行相同的更新，之后导出下一个使用加密密钥，从而在对等远程节点获得， 下一个使用相同的键。 数据库优选地是与加密/解密同时使用的数据压缩/解压缩系统的字典，以通过安全链路传输数据。 虽然密钥经常更新，为了提高安全性，本发明不需要密钥更新需要实际分发。