公开(公告)号：US10121430B2

公开(公告)日：2018-11-06

申请号：US14942068

申请日：2015-11-16

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Jungbae Kim ,  Kyung Wook Kim ,  MinKyu Kim ,  Shih Chang Chang ,  Vasudha Gupta ,  Young Bae Park

IPC: G09G3/36 ,  G09G3/3233 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

Abstract: A display may have an array of light-emitting diode pixels or pixels containing portions of a liquid crystal layer to which electric fields are applied using electrodes. A pixel with a light-emitting diode may have a drive transistor coupled in series with the light-emitting diode. A storage capacitor may be coupled to a gate of the drive transistor. A pixel with a liquid crystal portion may have a storage capacitor coupled to a given one of the electrodes in that pixel. Switching circuitry in each pixel may be used to load data from a data line into the storage capacitor of the pixel. The switching circuitry may include a semiconducting-oxide transistor coupled to an associated data line and a series-connected silicon transistor that is coupled to the storage capacitor.

公开(公告)号：US09760823B2

公开(公告)日：2017-09-12

申请号：US14711217

申请日：2015-05-13

Applicant: Apple Inc.

Inventor： Byung Duk Yang ,  Kwang Soon Park ,  Enkhamgalan Dorjgotov ,  Kyung Wook Kim ,  Shih Chang Chang

IPC: G02F1/1335 ,  G06K19/077 ,  G02F1/1368 ,  G02F1/133 ,  G06K7/10 ,  G02F1/1333

CPC classification number: G06K19/0772 ,  G02F1/13306 ,  G02F1/133512 ,  G02F1/133528 ,  G02F1/1368 ,  G02F2001/133388 ,  G06K7/10198

Abstract: A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.

公开(公告)号：US09645464B2

公开(公告)日：2017-05-09

申请号：US14850006

申请日：2015-09-10

Applicant: Apple Inc.

Inventor： Byung Duk Yang ,  Chia Hsuan Tai ,  Hiroshi Osawa ,  Kyung Wook Kim ,  Ming-Chin Hung ,  Shang-Chih Lin ,  Shih Chang Chang ,  Yu Cheng Chen ,  Yuan Chen

IPC: G02F1/1333 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1362 ,  H01L29/786 ,  H01L29/51 ,  G02B6/00

CPC classification number: G02F1/1368 ,  G02B6/00 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/1362 ,  G02F1/136209 ,  G02F2001/133521 ,  G02F2001/136222 ,  H01L29/518 ,  H01L29/78606

Abstract: A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. The display layers may include a color filter layer having an array of color filter elements on a glass substrate and a thin-film transistor layer having a layer of thin-film transistor circuitry on a glass substrate. Dielectric layers within the display layers such as dielectric layers within the thin-film transistor layer may have differing indices of refraction. Reflections and color shifts due to index of refraction discontinuities may be minimized by interposing graded index dielectric layers between adjacent layers with different indices. The graded index layers may be formed from structures with a continuously varying index of refraction or structures with a step-wise varying index of refraction.

公开(公告)号：US20160098965A1

公开(公告)日：2016-04-07

申请号：US14504215

申请日：2014-10-01

Applicant: Apple Inc.

Inventor： Hao-Lin Chiu ,  Byung Duk Yang ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee

IPC: G09G3/36 ,  G02F1/1362 ,  H01L23/528 ,  G02F1/1368 ,  H01L27/12 ,  H01L23/522

CPC classification number: G09G3/3648 ,  G02F1/13338 ,  G02F1/134309 ,  G02F1/1345 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13456 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04104 ,  G06F2203/04112 ,  G09F9/30 ,  G09G3/3666 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/0281 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract translation: 显示器可以具有排列成行和列的像素阵列。 每个像素可以具有用于控制与该像素相关联的输出光量的晶体管。 晶体管可以是具有有源区的薄膜晶体管，第一和第二源极 - 漏极端子和栅极。 栅极线可用于将栅极控制信号分配到每行中的晶体管的栅极。 垂直于栅极线延伸的数据线可用于沿像素列分布图像数据。 栅极线可以连接到平行于数据线延伸的栅极线扩展。 数据线可以各自重叠相应的一个栅极线延伸。 通孔可用于将栅极线延伸部分连接到栅极线。 门线扩展可能都具有相同的长度。

公开(公告)号：US09159288B2

公开(公告)日：2015-10-13

申请号：US13661839

申请日：2012-10-26

Applicant: Apple Inc.

Inventor： Shih Chang Chang ,  Young Bae Park ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Szu-Hsien Lee

IPC: G09G3/36

CPC classification number: G09G3/3677

Abstract: Gate line driver circuitry applies an output pulse to each of several gate lines for a display element array. The circuitry has a number of gate drivers each being coupled to drive a respective one of the gate lines. Each of the gate drivers has an output stage in which a high side transistor and a low side transistor are coupled to drive the respective gate line, responsive to at least one clock signal. A pull down transistor is coupled to discharge a control electrode of the output stage. A control circuit having a cascode amplifier is coupled to drive the pull down transistor as a function of a) at least one clock signal and b) feedback from the control electrode. Other embodiments are also described and claimed.

Abstract translation: 栅极线驱动器电路将输出脉冲施加到用于显示元件阵列的多个栅极线中的每一个。 电路具有多个栅极驱动器，每个栅极驱动器被耦合以驱动相应的一条栅极线。 每个栅极驱动器具有输出级，其中高侧晶体管和低侧晶体管耦合以响应于至少一个时钟信号驱动相应的栅极线。 耦合下拉晶体管以放电输出级的控制电极。 具有共源共栅放大器的控制电路被耦合以作为a）至少一个时钟信号和b）来自控制电极的反馈来驱动下拉晶体管。 还描述和要求保护其他实施例。

公开(公告)号：US20140370655A1

公开(公告)日：2014-12-18

申请号：US14474433

申请日：2014-09-02

Applicant: Apple Inc.

Inventor： Ming-Chin Hung ,  Kyung Wook Kim ,  Young Bae Park ,  Hao-Lin Chiu ,  Chun-Yao Huang ,  Shih Chang Chang

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/66742 ,  H01L27/1225 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/786 ,  H01L29/7869

Abstract: A method is provided for fabricating a thin-film transistor (TFT). The method includes forming a semiconductor layer over a gate insulator that covers a gate electrode, and depositing an insulator layer over the semiconductor layer, as well as etching the insulator layer to form a patterned etch-stop without losing the gate insulator. The method also includes forming a source electrode and a drain electrode over the semiconductor layer and the patterned etch-stop. The method further includes removing a portion of the semiconductor layer beyond the source electrode and the drain electrode such that a remaining portion of the semiconductor layer covers the gate insulator in a first overlapping area of the source electrode and the gate electrode and a second overlapping area of the drain electrode and gate electrode.

公开(公告)号：US20140211120A1

公开(公告)日：2014-07-31

申请号：US13752612

申请日：2013-01-29

Applicant: APPLE INC.

Inventor： Byung Duk Yang ,  Kyung Wook Kim ,  Young Bae Park ,  Shih Chang Chang ,  John Z. Zhong

IPC: G02F1/1362 ,  H01L33/36

CPC classification number: G02F1/136286 ,  G02F1/133784 ,  G02F1/134309 ,  G02F2001/134318 ,  G02F2001/136236

Abstract: A liquid crystal display (LCD) includes an array of pixels over a thin film transistor (TFT) substrate. The TFT substrate includes a TFT that has a first metal layer to form a gate electrode and a second metal layer to form a source electrode and a drain electrode for each pixel. The LCD also includes an organic insulation layer disposed over the TFT substrate, where the organic insulator layer has trenches on a top surface. The LCD further includes a third metal layer disposed over the organic insulation layer in the trenches, the trenches having a trench depth at least equal to the thickness of the third metal layer. The LCD also includes a passivation layer over the third metal layer, and a pixel electrode for each pixel over the passivation layer. The LCD further includes a polymer layer over the pixel electrode, and liquid molecules on the polymer layer.

Abstract translation: 液晶显示器（LCD）包括薄膜晶体管（TFT）衬底上的像素阵列。 TFT基板包括具有形成栅电极的第一金属层和形成用于每个像素的源电极和漏电极的第二金属层的TFT。 LCD还包括设置在TFT基板上的有机绝缘层，其中有机绝缘体层在顶表面上具有沟槽。 LCD还包括设置在沟槽中的有机绝缘层之上的第三金属层，沟槽的沟槽深度至少等于第三金属层的厚度。 LCD还包括在第三金属层上的钝化层，以及在钝化层上的每个像素的像素电极。 LCD还包括像素电极上方的聚合物层和聚合物层上的液体分子。

公开(公告)号：US20240420643A1

公开(公告)日：2024-12-19

申请号：US18654541

申请日：2024-05-03

Applicant: Apple Inc.

Inventor： Hao-Lin Chiu ,  Chin-Wei Lin ,  Shinya Ono ,  Kyung Wook Kim ,  Szu-Hsien Lee ,  Pei-En Chang ,  Kwang Soon Park

IPC: G09G3/3266 ,  H01L27/12 ,  H01L29/786

Abstract: A driver circuit configured to output a control signal to a row of display pixels is provided. The driver circuit can include a first transistor having a drain terminal coupled to a first positive power supply line, a gate terminal, and a source terminal that is coupled to an output port of the driver circuit on which the control signal is generated and a second transistor having a drain terminal coupled to the output port of the driver circuit, a gate terminal, and a source terminal that is coupled to a first ground power supply line. The first and second transistors can be coupled to a plurality of transistors coupled between a second positive power supply line and a second ground power supply line, configured to receive one or more clocks signals, and at least some of which include bottom gate terminals.

公开(公告)号：US20240086014A1

公开(公告)日：2024-03-14

申请号：US18514934

申请日：2023-11-20

Applicant: Apple Inc.

Inventor： Rungrot Kitsomboonloha ,  Donggeon Han ,  Jason N Gomez ,  Kyung Wook Kim ,  Nikolaus Hammler ,  Pei-En Chang ,  Saman Saeedi ,  Shih Chang Chang ,  Shinya Ono ,  Suk Won Hong ,  Szu-Hsien Lee ,  Victor H Yin ,  Young-Jik Jo ,  Yu-Heng Cheng ,  Joyan G Sanctis ,  Hongwoo Lee

IPC: G06F3/041 ,  G06F3/044 ,  H10K59/40

CPC classification number: G06F3/04182 ,  G06F3/044 ,  H10K59/40 ,  G06F3/0412 ,  G06F2203/04107 ,  G06F2203/04112

Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.

公开(公告)号：US20190086720A1

公开(公告)日：2019-03-21

申请号：US16041667

申请日：2018-07-20

Applicant: Apple Inc.

Inventor： Byung Duk Yang ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Kyung Wook Kim ,  Sai-Chang Liu ,  Shih Chang Chang

IPC: G02F1/1335 ,  G02F1/133 ,  G02F1/1334 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/136209 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/133357 ,  G02F2001/136222 ,  G02F2001/13685

Abstract: A display may have pixels configured to display images. The pixels may be formed from thin-film transistor circuitry on a substrate. Color filter elements formed from colored polymer such as colored photoimageable polymer may be formed on the substrate. A black matrix formed from black photoimageable polymer may have an array of openings. The colored polymer may have first portions that overlap the black matrix and second portions in the openings that form the color filter elements. In some portions of the pixels, the thin-film transistor circuitry may be interposed between the first portions of the colored polymer and the black matrix. In other portions of the pixels, data lines may be formed that are overlapped by the black matrix and that are interposed between the first portions of the colored polymer and the black matrix.