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    Methods Of Forming Alpha And Beta Tantalum Films With Controlled And New Microstructures
    44.
    发明申请
    Methods Of Forming Alpha And Beta Tantalum Films With Controlled And New Microstructures 审中-公开
    用控制和新的微结构形成α和β钽薄膜的方法

    公开(公告)号：US20070280848A1

    公开(公告)日：2007-12-06

    申请号：US10593809

    申请日：2005-03-24

    申请人： Jagdish Narayan ,  Prabhat Kumar ,  Richard Wu

    发明人： Jagdish Narayan ,  Prabhat Kumar ,  Richard Wu

    IPC分类号： B05D5/12 ,  C22C27/02

    CPC分类号： C23C16/06 ,  C23C14/16 ,  C23C14/548

    摘要： Thin tantalum films having novel microstructures are provided. The films have microstructures such as nanocrystalline, single crystal and amorphous. These films provide excellent diffusion barrier properties and are useful in microelectronic devices. Methods of forming the films using pulsed laser deposition (PLD) and molecular beam epitaxy (MBE) deposition methods are also provided, as are microelectronic devices incorporating these films.

    摘要翻译： 提供具有新颖微结构的薄钽薄膜。 该膜具有微结构，如纳米晶体，单晶和无定形。 这些膜提供优异的扩散阻挡性能并且在微电子器件中是有用的。 还提供了使用脉冲激光沉积（PLD）和分子束外延（MBE）沉积方法形成膜的方法，以及包含这些膜的微电子器件也是如此。

    UV-CURE PRE-TREATMENT OF CARRIER FILM FOR WAFER DICING USING HYBRID LASER SCRIBING AND PLASMA ETCH APPROACH
    45.
    发明申请
    UV-CURE PRE-TREATMENT OF CARRIER FILM FOR WAFER DICING USING HYBRID LASER SCRIBING AND PLASMA ETCH APPROACH 有权
    使用混合激光扫描和等离子体蚀刻方法进行波长涂覆的载体膜的UV固化预处理

    公开(公告)号：US20160315009A1

    公开(公告)日：2016-10-27

    申请号：US14697391

    申请日：2015-04-27

    申请人： Wei-Sheng Lei ,  Brad Eaton ,  Jungrae Park ,  Ajay Kumar ,  James S. Papanu ,  Prabhat Kumar

    发明人： Wei-Sheng Lei ,  Brad Eaton ,  Jungrae Park ,  Ajay Kumar ,  James S. Papanu ,  Prabhat Kumar

    IPC分类号： H01L21/78 ,  H01L21/683 ,  H01L21/268 ,  H01L21/67 ,  H01L21/308 ,  H01L21/3065

    CPC分类号： H01L21/78 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

    摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side of the semiconductor wafer includes adhering a back side the semiconductor wafer on the dicing tape of a substrate carrier. Subsequent to adhering the semiconductor wafer on a dicing tape, the dicing tape is treated with a UV-cure process. Subsequent to treating the dicing tape with the UV-cure process, a dicing mask is formed on the front side of the semiconductor wafer, the dicing mask covering and protecting the integrated circuits. The dicing mask is patterned with a laser scribing process to provide gaps in the dicing mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the dicing mask layer to singulate the integrated circuits.

    摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，在半导体晶片的正面上切割具有多个集成电路的半导体晶片的方法包括将半导体晶片的背面粘附在基板载体的切割带上。 在将半导体晶片粘附在切割带上之后，用UV固化工艺处理切割带。 在通过UV固化处理处理切割带之后，在半导体晶片的前侧形成切割掩模，该切割掩模覆盖并保护集成电路。 用激光刻划工艺对切割掩模进行图案化，以在切割掩模之间提供间隙，在半导体晶片的间隙暴露在集成电路之间。 通过切割掩模层中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。

    Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach
    46.
    发明授权
    Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach 有权
    使用混合激光划线和等离子体蚀刻方法对用于晶片切割的聚合物干膜进行真空层压

    公开(公告)号：US09159624B1

    公开(公告)日：2015-10-13

    申请号：US14589913

    申请日：2015-01-05

    申请人： Wei-Sheng Lei ,  Prabhat Kumar ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

    发明人： Wei-Sheng Lei ,  Prabhat Kumar ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

    IPC分类号： H01L21/78 ,  H01L21/8234

    CPC分类号： H01L21/78 ,  H01L21/6836 ,  H01L21/8234 ,  H01L2221/68327 ,  H01L2221/6834

    摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves laminating a polymeric mask layer onto a front side of the semiconductor wafer by dry film vacuum lamination, the polymeric mask layer covering and protecting the integrated circuits. The method also involves patterning the polymeric mask layer with a laser scribing process to provide gaps in the polymeric mask layer, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the gaps in the polymeric mask layer to singulate the integrated circuits. The method also involves, subsequent to plasma etching the semiconductor wafer, removing the polymeric mask layer.

    摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个实例中，对具有多个集成电路的半导体晶片进行切割的方法包括通过干膜真空层压将聚合物掩模层层压到半导体晶片的正面上，该聚合物掩模层覆盖并保护集成电路。 该方法还包括用激光划线工艺图案化聚合物掩模层，以在聚合物掩模层中提供间隙，间隙暴露集成电路之间的半导体晶片的区域。 该方法还包括通过聚合物掩模层中的间隙等离子体蚀刻半导体晶片以对集成电路进行分离。 该方法还涉及在等离子体蚀刻半导体晶片之后，去除聚合物掩模层。

    Device for human body resting support area interface interaction control and method thereof
    47.
    发明申请
    Device for human body resting support area interface interaction control and method thereof 审中-公开
    人体休息支撑区界面相互作用控制装置及其方法

    公开(公告)号：US20090001800A1

    公开(公告)日：2009-01-01

    申请号：US12214819

    申请日：2008-06-24

    申请人： Prabhat Kumar

    发明人： Prabhat Kumar

    IPC分类号： A47C7/74

    CPC分类号： A47C7/746 ,  A47C7/021 ,  A47C7/029

    摘要： A device for human body resting area interface interaction control with a method thereof, wherein moving unexposed air into each zone of body contour adapting flexural collapse resisting void interacts with body and exposed air exit trough flexural low resistance duct.

    摘要翻译： 一种用于人体休息区界面相互作用控制的装置，其方法是将未暴露的空气移动到身体轮廓的每个区域中，适应抗弯曲抵抗空隙与身体和暴露的空气出口槽弯曲低阻力管道相互作用。

    Refractory metal substrate with improved thermal conductivity
    49.
    发明申请
    Refractory metal substrate with improved thermal conductivity 有权
    具有改善导热性的耐火金属基材

    公开(公告)号：US20060091552A1

    公开(公告)日：2006-05-04

    申请号：US10978940

    申请日：2004-11-01

    申请人： Henry Breit ,  Rong-Chein Wu ,  Prabhat Kumar

    发明人： Henry Breit ,  Rong-Chein Wu ,  Prabhat Kumar

    IPC分类号： H01L23/48

    CPC分类号： H01L23/3736 ,  H01L23/3733 ,  H01L23/3735 ,  H01L2924/0002 ,  Y10T428/12361 ,  Y10T428/12486 ,  Y10T428/12528 ,  Y10T428/12535 ,  Y10T428/12806 ,  Y10T428/12861 ,  Y10T428/12903 ,  Y10T428/31678 ,  H01L2924/00

    摘要： A substrate for semiconductor and integrated circuit components including: a core plate containing a Group VIB metal from the periodic table of the elements and/or an anisotropic material, having a first major surface and a second major surface and a plurality of openings extending, at least partially, from the first major surface to the second major surface; and a Group IB metal from the periodic table of the elements or other high thermally conductive material filling at least a portion of the space encompassed by at least some of the openings; and optionally, a layer containing a Group IB metal from the periodic table or other high thermally conductive material disposed over at least a portion of the first major surface and at least a portion of the second major surface. The substrate can be used in electronic devices, which can also include one or more semiconductor components.

    摘要翻译： 一种用于半导体和集成电路部件的衬底，包括：含有来自元件的周期表的VIB族金属和/或各向异性材料的芯板，具有第一主表面和第二主表面，以及多个开口， 最少部分地从第一主表面到第二主表面; 和来自元件周期表的IB族金属或其它高导​​热材料填充由至少一些开口包围的空间的至少一部分; 以及任选地，包含来自周期表的IB族金属或设置在第一主表面的至少一部分和第二主表面的至少一部分上的其它高导热材料的层。 该基板可用于电子设备中，其也可包括一个或多个半导体部件。