公开(公告)号：US07061589B2

公开(公告)日：2006-06-13

申请号：US10233916

申请日：2002-09-03

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: G03B27/62 ,  G03F1/00 ,  G03C5/00

CPC classification number: G03F1/62 ,  G03F7/70866 ,  G03F7/70975 ,  G03F7/70983 ,  G03F7/70991

Abstract: An apparatus for mounting at least one hard pellicle to a mask which includes an enclosure having an interior cavity, demounting means for removing a protective cover from a mask, mounting means for mounting at least one hard pellicle to the mask and conduit means for pumping a light-transmitting gas into the interior cavity between the hard pellicle and the mask.

公开(公告)号：US09134627B2

公开(公告)日：2015-09-15

申请号：US13328264

申请日：2011-12-16

Applicant: Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

Inventor： Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

IPC: H01L21/66 ,  G03F7/20 ,  H01L23/544

CPC classification number: G03F7/70633 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.

Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。 该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构，并确定第二结构的放置信息。 该方法还包括在第三层中形成第三结构，该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。 形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构。

公开(公告)号：US20130320243A1

公开(公告)日：2013-12-05

申请号：US13484524

申请日：2012-05-31

Applicant: Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

Inventor： Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

IPC: G21K5/10

CPC classification number: H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J2237/31761

Abstract: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

Abstract translation: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度（MSSW）扫描晶片。 通过限制集成电路（IC）场尺寸以允许MSSW覆盖整个场，MSSW被应用于减小晶片的扫描通道，从而增加吞吐量。 当用MSSW扫描晶片时，下一个扫描通道数据可以重新排列并加载到存储器缓冲器中。 因此，一旦一个扫描通道完成，读取存储器缓冲器中的下一个扫描通道数据进行扫描。

公开(公告)号：US08510687B1

公开(公告)日：2013-08-13

申请号：US13409765

申请日：2012-03-01

Applicant: Pei-Yi Liu ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Jaw-Jung Shin ,  Burn Jeng Lin

Inventor： Pei-Yi Liu ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Jaw-Jung Shin ,  Burn Jeng Lin

IPC: G06F17/50

CPC classification number: G03F1/36

Abstract: The present disclosure involves a method of data preparation in lithography processes. The method of data preparation includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, and converting the IC layout design GDS grid to a second exposure grid by applying an error diffusion and a grid shift technique to a sub-pixel exposure grid.

Abstract translation: 本公开涉及在光刻工艺中的数据准备方法。 数据准备的方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，并且通过向第二曝光网格应用误差扩散和网格移位技术将IC布局设计GDS网格转换为第二曝光网格 子像素曝光网格。

公开(公告)号：US20130157389A1

公开(公告)日：2013-06-20

申请号：US13328264

申请日：2011-12-16

Applicant: Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

Inventor： Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

IPC: H01L21/66

CPC classification number: G03F7/70633 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure

Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。 该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构，并确定第二结构的放置信息。 该方法还包括在第三层中形成第三结构，该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。 形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构

公开(公告)号：US08381139B2

公开(公告)日：2013-02-19

申请号：US13006608

申请日：2011-01-14

Applicant: Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

Inventor： Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

IPC: G06F17/50

CPC classification number: H01L22/10 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/70466 ,  G06F17/5036 ,  G06F17/5072 ,  G06F17/5081 ,  H01L21/31144 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The embodiments of via mask splitting methods for double patterning technology described enable via patterning to align to a metal layer underneath or overlying to reduce overlay error and to increase via landing. If adjacent vias violate the G0-mask-split-rule for space or pitch (or both) between vias, the mask assignment of end vias are given higher priority to ensure good landing of end vias, since they are at higher risk of mislanding. The metal correlated via mask splitting methods enable better via performance, such as lower via resistance, and higher via yield.

Abstract translation: 所描述的用于双重图案化技术的通孔掩模分裂方法的实施例使得能够经由图案化以对准下面的金属层或覆盖以减少覆盖误差并增加通过着陆。 如果相邻的通孔违反了通孔之间的空间或间距（或两者）的G0-掩模分割规则，则优先考虑末端通孔的掩模分配，以确保最终通孔的良好着陆，因为它们具有较高的误放置风险。 通过掩模分离方法相关的金属能够实现更好的通过性能，例如较低的通孔电阻和较高的通孔产量。

公开(公告)号：US20110261334A1

公开(公告)日：2011-10-27

申请号：US13176587

申请日：2011-07-05

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: G03B27/52

CPC classification number: G02B7/028 ,  G02B7/04 ,  G03F7/70341

Abstract: An apparatus for immersion lithography that includes an imaging lens which has a front surface, a fluid-containing wafer stage for supporting a wafer that has a top surface to be exposed positioned spaced-apart and juxtaposed to the front surface of the imaging lens, and a fluid that has a refractive index between about 1.0 and about 2.0 filling a gap formed in-between the front surface of the imaging lens and the top surface of the wafer. A method for immersion lithography can be carried out by flowing a fluid through a gap formed in-between the front surface of an imaging lens and a top surface of a wafer. The flow rate and temperature of the fluid can be controlled while particulate contaminants are filtered out by a filtering device.

Abstract translation: 一种用于浸没式光刻的装置，其包括具有前表面的成像透镜，用于支撑晶片的含流体的晶片台，所述晶片载台具有被间隔开并与所述成像透镜的前表面并置的待暴露的顶表面;以及 具有约1.0至约2.0的折射率的流体填充在成像透镜的前表面和晶片的顶表面之间形成的间隙。 可以通过使流体流过形成在成像透镜的前表面和晶片的顶表面之间的间隙来进行浸没式光刻的方法。 可以控制流体的流速和温度，同时通过过滤装置将颗粒污染物过滤掉。

公开(公告)号：US20090309253A1

公开(公告)日：2009-12-17

申请号：US12137259

申请日：2008-06-11

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: B28B11/08 ,  B28B1/00

CPC classification number: H01L21/67092 ,  H01L21/31051 ,  H01L21/31058

Abstract: A method for planarizing a polymer layer is provided which includes providing a substrate having the polymer layer formed thereon, providing a structure having a substantially flat surface, pressing the flat surface of the structure to a top surface of the polymer layer such that the top surface of the polymer layer substantially conforms to the flat surface of the structure, and separating the flat surface of the structure from the top surface of the polymer material layer.

Abstract translation: 提供了一种用于平面化聚合物层的方法，其包括提供其上形成有聚合物层的基底，提供具有基本平坦表面的结构，将该结构的平坦表面压在聚合物层的顶表面上，使得顶表面 的聚合物层基本上符合结构的平坦表面，并且将结构的平坦表面与聚合物材料层的顶表面分离。

公开(公告)号：US20090268184A1

公开(公告)日：2009-10-29

申请号：US12203494

申请日：2008-09-03

Applicant: Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

Inventor： Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

IPC: G03B27/54

CPC classification number: G03F7/70383 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/3174

Abstract: A direct-write (DW) exposure system is provided which includes a stage for holding a substrate and configured to scan the substrate along an axis during exposure, a data processing module for processing pattering data and generating instructions associated with the patterning data, and an exposure module that includes a plurality of beams that are focused onto the substrate such that the beams cover a width that is larger than a width of a field size and a beam controller that controls the plurality of beams in accordance with the instructions as the substrate is scanned along the axis. The widths are in a direction different from the axis.

Abstract translation: 提供了一种直接写入（DW）曝光系统，其包括用于保持衬底并被配置为在曝光期间沿着轴扫描衬底的台，用于处理图案数据并产生与图案形成数据相关联的指令的数据处理模块，以及 曝光模块，其包括聚焦在基板上的多个光束，使得光束覆盖大于场大小的宽度的宽度;以及根据作为衬底的指令来控制多个光束的光束控制器 沿轴扫描。 宽度在与轴不同的方向。

公开(公告)号：US07501226B2

公开(公告)日：2009-03-10

申请号：US10874982

申请日：2004-06-23

Applicant: Burn Jeng Lin ,  Tsai-Sheng Gau ,  Chun-Kung Chen ,  Ru-Gun Liu ,  Shing Shen Yu ,  Jen Chieh Shih

Inventor： Burn Jeng Lin ,  Tsai-Sheng Gau ,  Chun-Kung Chen ,  Ru-Gun Liu ,  Shing Shen Yu ,  Jen Chieh Shih

IPC: G03B27/52

CPC classification number: G03F7/70808 ,  G03F7/70341

Abstract: An immersion lithography system is disclosed to comprise a fluid containing feature for providing an immersion fluid for performing immersion lithography on a wafer, and a seal ring covering a predetermined portion of a wafer edge for preventing the immersion fluid from leaking through the covered portion of the wafer edge while the fluid is used for the immersion lithography.

Abstract translation: 公开了一种浸没式光刻系统，其包括用于提供用于在晶片上进行浸没式光刻的浸没流体的流体容纳特征，以及覆盖晶片边缘的预定部分的密封环，用于防止浸没流体泄漏通过 晶片边缘，同时流体用于浸没光刻。